IS61QDB42M36 Datasheet, PDF (23/28 Pages) Integrated Silicon Solution, Inc – 72 Mb (2M x 36 & 4M x 18) QUAD (Burst of 4) Synchronous SRAMs

72 Mb (2M x 36 & 4M x 18)
QUAD (Burst of 4) Synchronous SRAMs
Q
I³
Scan Register Definition
Register Name
Instruction
Bypass
ID
Boundary Scan
ID Register Definition
Part
4M x 18
2M x 36
Revision Number
(31:29)
000
000
Part Configuration Definition:
def = 011 for 72Mb
wx = 11 for x36, 10 for x18
t = 1 for DLL, 0 for non-DLL
q = 1 for QUADB4, 0 for DDR-II
b = 1 for burst of 4, 0 for burst of 2
s = 1 for separate I/0, 0 for common I/O
Bit Size x18 or x36
3
1
32
109
Field Bit Number and Description
Part Configuration
(28:12)
JEDEC Code
(11:1)
00def0wx0t0q0b0s0
000 101 001 00
00def0wx0t0q0b0s0
000 101 001 00
Start Bit
(0)
1
1
Integrated Silicon Solution, Inc.
23
Rev. 
11/10/09