IS61QDB42M36 Datasheet, PDF (19/28 Pages) Integrated Silicon Solution, Inc – 72 Mb (2M x 36 & 4M x 18) QUAD (Burst of 4) Synchronous SRAMs

72 Mb (2M x 36 & 4M x 18)
QUAD (Burst of 4) Synchronous SRAMs
Write and NOP Timing Diagram
Write
t_KHKH
t_KHKL
t_KLKH
K
Write
t_KHKH
K
t_AVKH
t_KHAX
SA
A1
t_IVKH
t_KHIX
W
A2
t_KHIX
NOP
NOP
BW_X
D (Data-In)
B1-1 B1-2 B1-3 B1-4 B2-1 B2-2 B2-3 B2-4
D1-1 D1-2
D1-3
D1-4
t_DVKH
t_KHDX
D2-1 D2-2 D2-3
D2-4
NOTE: (B1-1 refers to all BW_X byte controls for D1-1)
Don’t Care
Undefined
Integrated Silicon Solution, Inc.
19
Rev. B
11/10/09