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IS61QDB42M36 Datasheet, PDF (13/28 Pages) Integrated Silicon Solution, Inc – 72 Mb (2M x 36 & 4M x 18) QUAD (Burst of 4) Synchronous SRAMs
72 Mb (2M x 36 & 4M x 18)
QUAD (Burst of 4) Synchronous SRAMs
Recommended DC Operating Conditions (TA = 0 to +70° C)
Parameter
Symbol
Minimum
Typical
Supply voltage
Output driver supply voltage
Input high voltage
Input low voltage
Input reference voltage
Clocks signal voltage
VDD
VDDQ
VIH
VIL
VREF
VIN - CLK
1.8 - 5%
1.4
VREF +0.1
-0.3
0.68
-0.3
1. All voltages are referenced to VSS. All VDD, VDDQ, and VSS pins must be connected.
2. VIH(Max) AC = See 0vershoot and Undershoot Timings.
3. VIL(Min) AC = See 0vershoot and Undershoot Timings.
4. VIN-CLK specifies the maximum allowable DC excursions of each clock (K, K, C, and C).
5. Peak-to-peak AC component superimposed on VREF may not exceed 5% of VREF.
Maximum
1.8 + 5%
1.9
VDDQ + 0.3
VREF - 0.1
0.95
VDDQ + 0.3
0vershoot and Undershoot Timings
Units
V
V
V
V
V
V
Notes
1
1
1, 2
1, 3
1, 5
1, 4
20% Min Cycle Time
VDDQ+0.6V
VIL(Min) AC
Undershoot Timing
VDDQ
VIH(Max) AC
Overshoot Timing
GND
GND-0.6V
20% Min Cycle Time
PBGA Thermal Characteristics
Item
Thermal resistance junction to ambient (airflow = 1m/s)
Thermal resistance junction to case
Thermal resistance junction to pins
Symbol
RΘJA
RΘJC
RΘJB
Rating
18.6
4.3
1.77
Units
° C/W
° C/W
° C/W
Integrated Silicon Solution, Inc.
13
Rev. B
11/10/09