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X3102 Datasheet, PDF (6/32 Pages) Intersil Corporation – 3 Cell Li-Ion Battery Protection and Monitor IC
X3102
Operating Specifications Over the recommended operating conditions unless otherwise specified (Continued)
SYMBOL
DESCRIPTION
CONDITION
TYP
MIN (Note 2) MAX UNIT
VCE
VSLR
Cell charge threshold voltage
X3102 wake-up voltage (For Vcc above
this voltage, the device wakes up)
VCE = 0.5V (VCE1, VCE0 = 0,0)
VCE = 0.8V (VCE1, VCE0 = 0,1)
VCE = 1.1V (VCE1, VCE0 = 1,0)
VCE = 1.4V (Vce1, VCE0 = 1,1)
(See Wake-up test circuit) 0°C to 50°C
0.4 0.5 0.6 V
0.7 0.8 0.9 V
1
1.1 1.2 V
1.3 1.4 1.5 V
8.5 9.5 11.2 V
VSLP X3102 sleep voltage (For Vcc above this (See Sleep test circuit) 0°C to 50°C
voltage, the device cannot go to sleep)
7.5 8.8 10.5 V
NOTES:
2. Typical at 25°C.
3. See Figure 10 on page 21.
4. The default setting is set at the time of shipping, but may be changed by the user via changes in the configuration register.
5. For reference only, this parameter is not 100% tested.
Test Circuits
VCC
VCC
VCC RGP
VCELL1
RGC
VCELL2 RGO
VCELL3
VCELL4
VRGO
VSS
Increase Vcc until VRGO turns on
WAKE-UP TEST CIRCUIT
VCC RGP
VCELL1
RGC
1V
VCELL2 RGO
1V
VCELL3
1V
VCELL4
VSS
Decrease Vcc until VRGO turns off
SLEEP TEST CIRCUIT
VRGO
Power-Up Timing
SYMBOL
PARAMETER
MIN
MAX
UNIT
tPUR Power-up to SPI read operation (RDSTAT, EEREAD STAT)
(Note 6)
TOC + 2ms
ms
tPUW1 Power-up to SPI write operation (WREN, WRDI, EEWRITE, WCFIG, SET IDL,
(Note 6) WCNTR)
TOC + 2ms
ms
tPUW2 Power-up to SPI write operation (WCNTR - bits 10 and 11)
(Note 6)
TOV + 200ms
ms
or
TUV + 200ms
(Note 7)
NOTES:
6. tPUR, tPUW1 and tPUW2 are the delays required from the time VCC is stable until a read or write can be initiated. These parameters are not 100%
tested.
7. Whichever is longer.
6
FN8246.0
December 22, 2004