X3102 Datasheet, PDF (20/32 Pages) Intersil Corporation – 3 Cell Li-Ion Battery Protection and Monitor IC

X3102
TABLE 20. OVER-CHARGE PROTECTION MODE-EVENT DIAGRAM DESCRIPTION
EVENT
EVENT DESCRIPTION
[0,1)
• Discharge FET is ON (UVP/OCP=V_SS).
• Charge FET is ON (OVP/LMON=V_SS), and hence battery cells are permitted to receive charge.
• All cell voltages (V_CELL – V_CELL4) are below the over-charge voltage threshold (V_OV).
• The device is in normal operation mode (i.e. not in a protection mode).
[1] • The voltage of one or more of the battery cells (V_CELL), exceeds V_OV.
• The internal over-charge detection delay timer begins counting down.
• The device is still in normal operation mode
(1,2)
[2]
The internal over-charge detection delay timer continues counting for T_OV seconds.
The internal over-charge detection delay timer times out
AND
V_CELL still exceeds V_OV.
• Therefore, the internal over-charge sense circuitry switches the charge FET OFF (OVP/LMON=Vcc).
• The device has now entered over-charge protection mode.
(2,3)
• While in over-charge protection mode:
• The battery cells are permitted to discharge via the discharge FET, and diode D₂ across the charge FET
• The X3102 monitors the voltages V_CELL1 - V_CELL4 to determine whether or not they have all fallen below the “Return from over-
charge threshold” (V_OVR).
• (It is possible to change the status of UVP/OCP or OVP/LMON using the control register)
[3] • All cell voltages fall below V_OVR—The device is now in normal operation mode.
• The X3102 automatically switches charge FET = ON (OVP/LMON = Vss)
• The status of the discharge FET remains unaffected.
• Charging of the battery cells can now resume.
Over-discharge Protection
If V_CELL < V_UV, for a time exceeding T_UV, the cells are said
to be in a over-discharge state (Figure 12). In this instance,
the X3102 automatically switches the discharge FET OFF
(UVP/OCP=Vcc), and then enter sleep mode.
The over-discharge (undervoltage) value, V_UV, can be
selected from the values shown in Table 5 by setting bits
VUV1, VUV0 in the configuration register. These bits are set
using the WCFIG command. Once in the sleep mode, the
following steps must occur before the X3102 allows the
battery cells to discharge:
• The X3102 must wake from sleep mode (See section
“Voltage Regulator” on page 26).
• The charge FET must be switched ON by the
microcontroller (OVP/LMON=V_SS), via the control register
(See section “CONTROL REGISTER FUNCTIONALITY”
on page 17).
• All battery cells must satisfy the condition: V_CELL > V_UVR
for a time exceeding T_UVR.
• The discharge FET must be switched ON by the
microcontroller (UVP/OCP=V_SS), via the control register
(See section “CONTROL REGISTER FUNCTIONALITY”
on page 17)
The times T_UV/T_UVR are varied using a capacitor (C_UV)
connected between pin UVT and GND (Table 13). The delay
T_UV that results from a particular capacitance C_UV, can be
approximated by the following linear equation:
T_UV (s) ≈ 10 x C_UV (µF)
T_UVR (ms) ≈ 70 x C_UV (µF)
TABLE 21. TYPICAL OVER-DISCHARGE DELAY TIMES
SYMBOL
DESCRIPTION
T_UV Over-discharge
detection delay
C_UV
0.1µF
DELAY
1.0s (Typ)
T_UVR Over-discharge release
time
0.1µF
7ms (Typ)
Sleep Mode
The X3102 can enter sleep mode in two ways:
i) The device enters the over-discharge protection mode.
ii) The user sends the device into sleep mode using the con-
trol register.
A sleep mode can be induced by the user, by setting the SLP
bit in the control register (Table 13) using the WCNTR
Instruction.
In sleep mode, power to all internal circuitry is switched off,
minimizing the current drawn by the device to 1µA (max). In
this state, the discharge FET and the charge FET are
switched OFF (OVP/LMON=V_CC and UVP/OCP=V_CC), and
the 5VDC regulated output (V_RGO) is 0V. Control of
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FN8246.0
December 22, 2004