X3102 Datasheet, PDF (18/32 Pages) Intersil Corporation – 3 Cell Li-Ion Battery Protection and Monitor IC

X3102
The function of each bit in the status register is shown in
Table 18.
Bit 0 of the status register (VRGS + OCDS) actually
indicates the status of two conditions of the X3102. Voltage
Regulator Status (VRGS) is an internally generated signal
which indicates that the output of the Voltage Regulator
(VRGO) has reached an output of 5VDC ± 0.5%. In this
case, the voltage regulator is said to be “tuned”. Before the
signal VRGS goes low (i.e. before the voltage regulator is
tuned), the voltage at the output of the regulator is nominally
5VDC ± 10% (See section “Voltage Regulator” on page 26.)
Overcurrent Detection Status (OCDS) is another internally
generated signal which indicates whether or not the X3102
is in overcurrent protection mode.
Signals VRGS and OCDS are logically OR’ed together
(VRGS+OCDS) and written to bit 0 of the status register
(See Table 18, Table 17 and Figure 8).
Bit 1 of the status register simply indicates whether or not the
X3102 is in over-discharge protection mode.
Bit 2 of the status register (CCES + OVDS) indicates the
status of two conditions of the X3102. Cell Charge Enable
Status (CCES) is an internally generated signal which
indicates the status of any cell voltage (V_CELL) with respect
to the Cell Charge Enable Voltage (V_CE). Over-charge
Voltage Detection Status (OVDS) is an internally generated
signal which indicates whether or not the X3102 is in over-
charge protection mode.
When the cell charge enable function is switched ON
(configuration bit SWCEN = 0), the signals CCES and OVDS
are logically OR’ed (CCES + OVDS) and written to bit 2 of
the status register. If the cell charge enable function is
switched OFF (configuration bit SWCEN = 1), then bit 2 of
the status register effectively only represents information
about the over-charge status (OVDS) of the X3102 (See
Table 18, Table 17 and Figure 8).
TABLE 18. STATUS REGISTER FUNCTIONALITY
BIT(S)
NAME
DESCRIPTION
CASE
STATUS
INTERPRETATION
0
VRGS + OCDS Voltage regulator status
-
+
Overcurrent
detection status
1
V_RGO not yet tuned (V_RGO = 5V ± 10%) OR
X3102 in overcurrent protection mode.
0
V_RGO tuned (V_RGO = 5V ± 0.5%) AND
X3102 NOT in overcurrent protection mode.
1
UVDS
Over-discharge
-
1 X3102 in over-discharge protection mode
detection status
0 X3102 NOT in over-discharge protection mode
2
CCES + OVDS
Cell charge
enable status
+
Over-charge
detection status
SWCEN = 0
(Note)
SWCEN = 1
(Note)
1
V_CELL < V_CE OR
X3102 in over-charge protection mode
0
V_CELL > V_CE AND
X3102 NOT in over-charge protection mode
1 X3102 in over-charge protection mode
0 X3102 NOT in over-charge protection mode
3-7
-
–
0 Not used (always return zero)
NOTE: This bit is set in the configuration register.
18
FN8246.0
December 22, 2004