X40231 Datasheet, PDF (26/36 Pages) Intersil Corporation – Triple Voltage Monitors, POR, 2 kbit EEPROM MEMORY, and Single/Dual DCP

X40231, X40233, X40235, X40237, X40239
TIMING DIAGRAMS
Figure 27. Bus Timing
t_F
t_HIGH
SCL
t_SU:STA
SDA IN
t_HD:STA
t_SU:DAT
t_LOW
t_HD:DAT
SDA OUT
t_R
t_AA t_DH
t_SU:STO
t_BUF
Figure 28. WP Pin Timing
START
SCL
SDA IN
WP
t_SU:WP
Clk 1
Clk 9
t_HD:WP
Figure 29. Write Cycle Timing
SCL
SDA
8th bit of last byte
ACK
t_WC
Stop
Condition
Start
Condition
26
FN8115.0
April 11, 2005