X40231 Datasheet, PDF (11/36 Pages) Intersil Corporation – Triple Voltage Monitors, POR, 2 kbit EEPROM MEMORY, and Single/Dual DCP

X40231, X40233, X40235, X40237, X40239
Byte load completed
by issuing STOP.
Enter ACK Polling
Issue START
Issue Slave Address
Byte (Read or Write)
Issue STOP
ACK
returned?
YES
High Voltage Cycle
complete. Continue
command sequence?
NO
NO
Issue STOP
YES
Continue normal
Read or Write
command sequence
PROCEED
Figure 5. Acknowledge Polling Sequence
N
R_Hx
WIPER
COUNTER
REGISTER
(WCR)
NON
VOLATILE
MEMORY
(NVM)
DECODER
2
1
0
“WIPER”
FET
SWITCHES
RESISTOR
ARRAY
R_Wx
Figure 6. DCP Internal Structure
At both ends of each array and between each resistor
segment there is a CMOS switch connected between
the resistor array and the wiper (R_wx) output. Within
each individual array, only one switch may be turned
on at any one time. These switches are controlled by
the Wiper Counter Register (WCR) (See Figure 6).
The WCR is a volatile register.
On power-up of the X4023x, wiper position data is au-
tomatically loaded into the WCR from its associated
Non Volatile Memory (NVM) Register. The Table below
shows the Initial Values of the DCP WCR’s before the
contents of the NVM is loaded into the WCR.
DCP
R₀ (64 TAP)
R₁ (100 TAP)
R₂ (256 TAP)
Initial Values Before Recall
V_H (TAP = 63)
V_L (TAP = 0)
V_H (TAP = 255)
The data in the WCR is then decoded to select and
enable one of the respective FET switches. A “make
before break” sequence is used internally for the FET
switches when the wiper is moved from one tap posi-
tion to another.
Hot Pluggability
Figure 7 shows a typical waveform that the X4023x
might experience in a Hot Pluggable situation. On
power-up, V_CC applied to the X4023x may exhibit
some amount of ringing, before it settles to the
required value.
The device is designed such that the wiper terminal
(R_Wx) is recalled to the correct position (as per the last
stored in the DCP NVM), when the voltage applied to
V_CC exceeds V_TRIP1 for a time exceeding t_PURST (the
Power-on Reset time, set in the CR Register - See
“CONTROL AND STATUS REGISTER” on page 18.).
Therefore, if t_trans is defined as the time taken for V_CC
to settle above V_TRIP1 (Figure 7): then the desired
wiper terminal position is recalled by (a maximum)
time: t_trans + t_PURST. It should be noted that t_trans is
determined by system hot plug conditions.
DCP Operations
In total there are three operations that can be per-
formed on any internal DCP structure:
—DCP Nonvolatile Write
—DCP Volatile Write
—DCP Read
11
FN8115.0
April 11, 2005