X40231 Datasheet, PDF (17/36 Pages) Intersil Corporation – Triple Voltage Monitors, POR, 2 kbit EEPROM MEMORY, and Single/Dual DCP

X40231, X40233, X40235, X40237, X40239
WRITE Operation
READ Operation
Signals from
the Master
S
t
Slave
a Address
r
t
S
Address Byte
t
Slave
a _Address
r
t
S
t
o
p
SDA Bus
1010000 0
1010000 1
Signals from
the Slave
A
A
C
C
K
K
A
C
K
Data
“Dummy” Write
Figure 15. Random EEPROM Address Read Sequence
The master terminates the read operation by not
responding with an ACKNOWLEDGE and instead
issuing a STOP condition (Refer to Figure 15).
A similar operation called “Set Current Address” also
exists. This operation is performed if a STOP is issued
instead of the second START shown in Figure 15. In
this case, the device sets the address pointer to that of
the Address Byte, and then goes into standby mode
after the STOP bit. All bus activity will be ignored until
another START is detected.
Sequential EEPROM Read
Sequential reads can be initiated as either a current
address read or random address read. The first Data
Byte is transmitted as with the other modes; however,
the master now responds with an ACKNOWLEDGE,
indicating it requires additional data. The X4023x con-
tinues to output a Data Byte for each ACKNOWL-
EDGE received. The master terminates the read
operation by not responding with an ACKNOWLEDGE
and instead issuing a STOP condition.
The data output is sequential, with the data from
address n followed by the data from address n + 1.
The address counter for read operations increments
through the entire memory contents to be serially read
during one operation. At the end of the address space
the counter “rolls over” to address 00h and the device
continues to output data for each ACKNOWLEDGE
received (Refer to Figure 16).
Signals from
the Master
SDA Bus
Signals from
the Slave
Slave
S
Address
A
A
A
t
C
C
C
o
K
K
K
p
0001
A
C
Data
K
(1)
Data
(2)
Data
(n-1)
Data
(n)
(n is any integer greater than 1)
Figure 16. Sequential EEPROM Read Sequence
17
FN8115.0
April 11, 2005