X40231 Datasheet, PDF (14/36 Pages) Intersil Corporation – Triple Voltage Monitors, POR, 2 kbit EEPROM MEMORY, and Single/Dual DCP

X40231, X40233, X40235, X40237, X40239
Signals from
the Master
SDA Bus
Signals from
the Slave
WRITE Operation
READ Operation
S
t
Slave
a
r
Address
t
Instruction
Byte
S
t
Slave
a
r
Address
t
S
Data Byte
t
o
p
10101110
W
T
0
0
000
P
1
P
0
10101111
A
A
A
C
C
C
K
K
K
“Dummy” write
Figure 10. DCP Read Sequence
DCPx
--
x=0
-
x=1
MSB
x=2
LSB
“-” = DON’T CARE
DCP Read Operation
A read of DCPx (x = 0,1,2) can be performed using the
three byte random read command sequence shown in
Figure 10.
The master issues the START condition and the Slave
Address Byte 10101110 which specifies that a
“dummy” write” is to be conducted. This “dummy” write
operation sets which DCP is to be read (in the preced-
ing Read operation). An ACKNOWLEDGE is returned
by the X4023x after the Slave Address if received cor-
rectly. Next, an Instruction Byte is issued on SDA. Bits
P1-P0 of the Instruction Byte determine which DCP
“wiper position” is to be read. In this case, the state of
the WT bit is “don’t care”. If the Instruction Byte format
is valid, then another ACKNOWLEDGE is returned by
the X4023x.
Following this ACKNOWLEDGE, the master immedi-
ately issues another START condition and a valid
Slave address byte with the R/W bit set to 1. Then the
X4023x issues an ACKNOWLEDGE followed by Data
Byte, and finally, the master issues a STOP condition.
The Data Byte read in this operation, corresponds to
the “wiper position” (value of the WCR) of the DCP
pointed to by bits P1 and P0.
It should be noted that when reading out the data byte
for DCP0 (64 Tap), the upper two most significant bits
are “unknown” bits. For DCP1 (100 Tap), the upper
most significant bit is an “unknown”. For DCP2 (256
Tap) however, all bits of the data byte are relevant
(See Figure 10).
2 kbit EEPROM ARRAY
Operations on the 2 kbit EEPROM Array, consist of
either 1, 2 or 3 byte command sequences. All opera-
tions on the EEPROM must begin with the Device
Type Identifier of the Slave Address set to 1010000. A
Read or Write to the EEPROM is selected by setting
the LSB of the Slave Address to the appropriate value
R/W (Read = “1”, Write = ”0”).
In some cases when performing a Read or Write to
the EEPROM, an Address Byte may also need to be
specified. This Address Byte can contain the values
00h to FFh.
Signals from
the Master
SDA Bus
Signals from
the Slave
WRITE Operation
S
t
a
Slave
Address
r
Address
Byte
t
1 01 00 00 0
A
A
Internal ^C
C
Device ^K
K
Address
Data
Byte
S
t
o
p
A
C
K
Figure 11. EEPROM Byte Write Sequence
14
FN8115.0
April 11, 2005