BD82HM55QMNT Datasheet, PDF (408/934 Pages) Intel Corporation – Intel® 5 Series Chipset and Intel® 3400 Series Chipset

Chipset Configuration Registers
10.1.56 CIR20—Chipset Initialization Register 20
Offset Address: 33CC–33CFh
Default Value: 00000000h
Attribute:
Size:
R/W
32-bit
Bit
31:0
Description
CIR20 Field 1—R/W. BIOS must program this field to 00044B00h for Intel^® Core™
i5 processor-based systems.
10.1.57 CIR21—Chipset Initialization Register 21
Offset Address: 33D0–33D3h
Default Value: 00000000h
Attribute:
Size:
R/W
32-bit
Bit
31:0
Description
CIR21 Field 1—R/W. BIOS must program this field to 00002000h for Intel^® Core™
i5 processor-based systems.
10.1.58 CIR22—Chipset Initialization Register 22
Offset Address: 33D4–33D7h
Default Value: 00000000h
Attribute:
Size:
R/W
32-bit
Bit
31:0
Description
CIR22 Field 1—R/W. BIOS must program this field to 00020000h for Intel^® Core™
i5 processor-based systems.
Program this register after all registers in the 3330-33D3 range and D31:F0:A9h are
already programmed.
408
Datasheet