IA8044_10 Datasheet, PDF (18/65 Pages) InnovASIC, Inc – SDLC Communications Controller

IA8044/IA8344
SDLC Communications Controller
Data Sheet
March 30, 2010
I/O for Memory, SIU, DMA, Interrupts, and Timers
Port 0
ADDR/DATA/IO
Port 2
Addr/Data/IO
Port 1
SPCL FUNC/IO
Port 3
SPCL FUNC/IO
Memory
Control
XTAL
Reset
Clock Gen.
& Timing
192x8 Dual Port
RAM
C8051
CPU
Control
Address/Data
Interrupts
SIU
Figure 5. Functional Block Diagram
Timers
®
IA211010112-04
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