TC1775 Datasheet, PDF (99/101 Pages) Infineon Technologies AG – 32-Bit Single-Chip Microcontroller

TC1775
Preliminary
SSC Master Mode Timing
V_SS = 0 V; V_DDP813 = 4.5 to 5.25 V; T_A = -40 °C to +125 °C; C_L = 50 pF;
Parameter
Symbol
Limit Values
Unit
SCLK/MTSR low/high from CLKOUT ¹⁾ t₆₀
MRST setup to SLCK rising/falling edge t₆₁
MRST hold from SLCK rising/falling edge t₆₂
min.
CC –
SR 14²⁾
SR 14²⁾
max.
7
ns
–
ns
–
ns
1) _{This parameter is valid for high current mode output driver characteristic and normal timing edge characteristic}
(P13_POCON.PECx = 00_B and P13_POCON.PDCx = 00_B).
2) _{Guaranteed by design characterization.}
t_CLKOUT
CLKOUT
t₆₀
t₆₀
t₆₀
SCLK
MTSR
State n-1
State n
State n+1
t₆₁
t₆₂
MRST
Data Valid
MCT04893
Note: The timing diagram assumes the highest possible baud rate operation.
(f_SSC = f_CLKOUT, SSCx_CLC.RMC = 1, SSCx_BR.BR_VALUE = 0000_H)
Figure 41 SSC Master Mode Timing
Data Sheet
95
V1.2, 2002-05