TC1775 Datasheet, PDF (51/101 Pages) Infineon Technologies AG – 32-Bit Single-Chip Microcontroller

TC1775
Preliminary
Peripheral Control Processor
The Peripheral Control Processor (PCP) performs tasks that would normally be
performed by the combination of a DMA controller and its supporting CPU interrupt
service routines in a traditional computer system. It could easily be considered as the
host processor’s first line of defense as an interrupt-handling engine. The PCP can off-
load the CPU from having to service time-critical interrupts. This provides many benefits,
including:
• Avoiding large interrupt-driven task context-switching latencies in the host processor
• Lessening the cost of interrupts in terms of processor register and memory overhead
• Improving the responsiveness of interrupt service routines to data-capture and data-
transfer operations
• Easing the implementation of multitasking operating systems.
The PCP has an architecture that efficiently supports DMA type transactions to and from
arbitrary devices and memory addresses within the TC1775 and also has reasonable
stand alone computational capabilities.
The PCP is made up of several modular blocks as follows:
• PCP Processor Core
• Code Memory (PCODE)
• Parameter Memory (PRAM)
• PCP Interrupt Control Unit (PICU)
• PCP Service Request Nodes (PSRN)
• System bus interface to the FPI Bus
The PCP is fully interrupt-driven, meaning it is only activated through service requests;
there is no main program running in the background as with a conventional processor.
Data Sheet
47
V1.2, 2002-05