TC1775 Datasheet, PDF (58/101 Pages) Infineon Technologies AG – 32-Bit Single-Chip Microcontroller

Preliminary
TC1775
S e rv ic e
Requestors
GPTU
8
GPTA
54
SSC0
3
SSC1
3
ASC0
4
ASC1
4
CAN
8
SDLM
2
ADC0
4
ADC1
4
RTC
1
BCU
1
PCP
Interrupt
Arbitration Bus
Service
Request
Nodes
8
8 SRNs
8
54
54 SRNs ₅₄
3
3 SRNs
3
3
3 SRNs
3
4
4 SRNs
4
4
4 SRNs
4
8
8 SRNs
8
2
2 SRNs
2
4
4 SRNs
4
4
4 SRNs
4
1
1 SRN
1
1
1 SRN
1
CPU
Interrupt
Arbitration Bus
Interrupt
Control Units
Int. Req.
P IP N
P IC U
2
2 SRNs
2
2
2 SRNs
2
Interrupt
Service
Providers
Int. Ack.
CCPN
PCP
1
1
1
1 SRNs
Debug
U n it
4
4
4 SRNs
4 Software
Interrupt
IC U
Int. Req.
P IP N
CPU
Int. Ack.
CCPN
MCB04779
Figure 16 Block Diagram of the TC1775 Interrupt System
Note: Depending on the selected system frequency f_SYS, the number of clocks for
interrupt arbitration cycles must be selected as follows:
f_SYS ≤ 30 MHz: ICR.CONECYC = 1
f_SYS > 30 MHz: ICR.CONECYC = 0
Data Sheet
54
V1.2, 2002-05