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TC1775 Datasheet, PDF (80/101 Pages) Infineon Technologies AG – 32-Bit Single-Chip Microcontroller
Preliminary
TC1775
A/D Converter Module
Sample
fADC
Peripheral
Clock Divider
(1:1) to (1:8)
fDIV
Programmable
Clock Divider
(1:1) to (1:128)
fBC
4:1
fANA
3:1
Programmable Time tS
Counter
CON.PCD
Arbiter
(1:20)
fTIMER
CON.CTC
Control Unit
(Timer)
CON.CPS
CHCONn.STC
Control/Status Logic
Interrupt Logic
External Trigger Logic
External Multiplexer Logic
Request Generation Logic
MCA04657
Figure 25 ADC Clock Circuit
Note: The frequency of fADC is the system clock frequency (fSYS) divided by the value of
bit field ADCx_CLC.RMC.
Oscillator Pins (Class C Pins)
TA = -40 °C to +125 °C; VDDOSC = 2.30 to 2.75 V; VSSOSC = 0 V;
Parameter
Symbol
Limit Values
Input low voltage at
XTAL1, XTAL3
VILX SR
Input high voltage at
XTAL1, XTAL3
VIHX SR
Input current at XTAL1 IIX1 CC
Input current at XTAL3 IIX3 CC
Input leakage current IOZ CC
XTAL1, XTAL31)
min.
-0.5
0.7 ×
VDDOSC
–
–
–
max.
0.3 ×
VDDOSC
VDDOSC
+ 0.5
±20
±0.5
±200
1) Only applicable in deep sleep mode.
Unit
V
V
µA
µA
nA
Test Conditions
–
–
0 V < VIN < VDDOSC
0 V < VIN < VDDOSC
0 V< VIN < VDDOSC
Data Sheet
76
V1.2, 2002-05