TLE9260-3QX Datasheet, PDF (98/175 Pages) Infineon Technologies AG – Dedicated Data Sheets are available for the different product variants

TLE9260-3QX
Supervision Functions
Depending on the configuration, the WD_FAIL bits will be set after a watchdog trigger failure as follows:
• In case an incorrect WD trigger is received (triggering in the closed watchdog window or when the watchdog
counter expires without a valid trigger) then the WD_FAIL bits will be increased (showing the number of
incorrect WD triggers)
• For config 2: the bits can have the maximum value of ‘01’
• For config 1, 3 and 4: the bits can have the maximum value of ‘10’
The WD_FAIL bits are cleared automatically when following conditions apply:
• After a successful watchdog trigger
• When the watchdog is OFF: in SBC Stop Mode after successfully disabling it, in SBC Sleep Mode, or in SBC
Fail-Safe Mode (except for a watchdog failure)
13.2.1 Time-Out Watchdog
The time-out watchdog is an easier and less secure watchdog than a window watchdog as the watchdog trigger
can be done at any time within the configured watchdog timer period.
A correct watchdog service immediately results in starting a new watchdog timer period. Taking the tolerances of
the internal oscillator into account leads to the safe trigger area as defined in Figure 41.
If the time-out watchdog period elapses, a watchdog reset is created by setting the reset output RO low and the
SBC switches to SBC Restart or SBC Fail-Safe Mode.
Typical timout watchdog trigger period
open window
Watchdog Timer Period (WD_TIMER)
safe trigger area
Figure 41 Time-out Watchdog Definitions
tWD x 1.50
uncertainty
tWD x 1.20
tWD x 1.80
t / [tWD_TIMER]
W d1_ TimeOut_ per . vsd
Data Sheet
98
Rev. 1.1, 2014-09-26