TLE9260-3QX Datasheet, PDF (154/175 Pages) Infineon Technologies AG – Dedicated Data Sheets are available for the different product variants

TLE9260-3QX
Serial Peripheral Interface
BUS_STAT_1
Bus Communication Status (Address 100 0100_B)
POR / Soft Reset Value: 0000 0000_B; Restart Value: 000x xxxx_B
7
6
5
4
3
2
1
0
Reserved
r
Reserved
r
Reserved
r
CANTO
rc
SYSERR CAN_FAIL_1 CAN_FAIL_0 VCAN_UV
r
rc
rc
rc
rc
Field
Bits
Reserved 7
Reserved 6:5
CANTO
4
SYSERR 3
CAN_FAIL 2:1
VCAN_UV 0
Type
r
r
rc
rc
rc
rc
Description
Reserved, always reads as 0
Reserved, always reads as 0
CAN Time Out Detection
0_B , Normal operation
1_B , CAN Time Out detected
SWK System Error
0_B , Selective Wake Mode is possible
1_B , System Error detected, SWK enabling not possible
CAN Failure Status
00_B , No error
01_B , CAN TSD shutdown
10_B , CAN_TXD_DOM: TXD dominant time out for more than 20ms
11_B , CAN_BUS_DOM: BUS dominant time out for more than 20ms
Under voltage CAN Bus Supply
0_B , Normal operation
1_B , CAN Supply under voltage detected. Transmitter disabled
Notes
1. CAN Recovery Conditions:
1.) TXD Time Out: TXD goes HIGH or transmitter is set to wake capable or switched off;
2.). Bus dominant time out: Bus will become recessive or transceiver is set to wake capable or switched off.
3.) Supply under voltage: as soon as the threshold is crossed again, i.e. VCAN > VCAN_UV for CAN
4.)In all cases (also for TSD shutdown): to enable the Bus transmission again, TXD needs to be HIGH for a
certain time (transmitter enable time).
2. The VCAN_UV comparator is enabled if the mode bit CAN_1 = ‘1’, i.e. in CAN Normal or CAN Receive Only
Mode.
3. CANTO will be set only if CAN2 = 1 (=SWK Mode enabled). It will be set as soon as CANSIL was set and will
stay set even in CANSIL it is reset. An interrupt is issued in SBC Stop- and SBC Normal Mode as soon as
CANTO is set and the interrupt is not masked out, i.e. CANTO_MASK must be set to 1.
4. The SYSERR Flag is set in case of a configuration error and in case of an error counter overflow (n>32).
It is only updated if SWK is enabled (CAN_2 = ‘1’). See also Chapter 5.4.3.
5. CANTO is set asynchronously to the INT pulse. In order to prevent undesired clearing of CANTO and thus
possibly missing this interrupt, the bit will be prevented from clearing (i.e. cannot be cleared) until the next
falling edge of INT.
Data Sheet
154
Rev. 1.1, 2014-09-26