TLE9260-3QX Datasheet, PDF (52/175 Pages) Infineon Technologies AG – Dedicated Data Sheets are available for the different product variants

TLE9260-3QX
5.4.7 CAN Flexible Data Rate (CAN FD) Tolerant Mode
The CAN FD tolerant mode can be activated by setting the bit CAN_FD_ EN = ‘1’ in the register
SWK_CAN_FD_CTRL. With this mode the internal CAN frame decoding will be stopped for CAN FD frame
formats:
• The high baudrate part of a CAN FD frame will be ignored,
• No Error Handling (Bit Stuffing, CRC checking, Form Errors) will be applied to remaining CAN frame fields
(Data Field, CRC Field, …),
• No wake up is done on CAN FD frames.
The internal CAN frame decoder will be ready for new CAN frame reception when the End of frame (EOF) of a
CAN FD frame is detected.The identification for a CAN FD frame is based on the EDL Bit, which is sent in the
Control Field of a CAN FD frame:
• EDL Bit = 1 identifies the current frame as an CAN FD frame and will stop further decoding on it.
• EDL Bit = 0 identifies the current frame as CAN 2.0 frame and processing of the frame will be continued
.
In this way it is possible to send mixed CAN frame formats without affecting the selective wake functionality by
error counter increment and subsequent misleading wake up.In addition to the CAN_FD_ EN bit also a filter setting
must be provided for the CAN FD tolerant mode. This filter setting defines the minimum dominant time for a CAN
FD dominant bit which will be considered as a dominant bit from the CAN FD frame decoder. This value must be
aligned with the selected high baudrate of the data field in the CAN network.
To support programming via CAN during CAN FD mode a dedicated SPI bit DIS_ERR_ CNT is available to avoid
an overflow of the implemented error counter (see also Chapter 5.4.2.4).
The behavior of the error counter depends on the setting of the bits DIS_ERR_ CNT and CAN_FD_ EN and is
show in below table:
Table 14 Error Counter Behavior
DIS_ERR_ CNT setting CAN_FD_ EN setting
0
0
1
0
0
1
1
1
Error Counter Behavior
Error Counter counts up when a CAN FD frame or an
incorrect/corrupted CAN frame is received; counts down
when a CAN frame is received properly
(as specified in ISO 11898-6)
Error Counter counts up when a CAN FD frame or an
incorrect/corrupted CAN frame is received; counts down
when a CAN frame is received properly
(as specified in ISO 11898-6)
Error Counter counts down when correct CAN (incl. CAN FD)
frame is received
Error Counter is and stays cleared to avoid an overflow during
programming via CAN
The DIS_ERR_ CNT bit is automatically cleared at Tsilence (t_SILENCE) expiration.
Data Sheet
52
Rev. 1.1, 2014-09-26