TLE9260-3QX Datasheet, PDF (157/175 Pages) Infineon Technologies AG – Dedicated Data Sheets are available for the different product variants

TLE9260-3QX
Serial Peripheral Interface
WK_LVL_STAT
WK Input Level (Address 100 1000_B)
POR / Soft Reset Value: xx00 0xxx_B;
Restart Value: xxxx 0xxx_B
7
6
5
4
3
2
1
SBC_DEV
_LVL
r
CFGP
r
GPIO2_LVL GPIO1_LVL Reserved
r
r
r
WK3_LVL WK2_LVL
r
r
r
0
WK1_LVL
r
Field
Bits
SBC_DEV 7
_LVL
CFGP
6
GPIO2_LVL 5
GPIO1_LVL 4
Reserved 3
WK3_LVL 2
WK2_LVL 1
WK1_LVL 0
Type
r
r
r
r
r
r
r
r
Description
Status of SBC Operating Mode at FO3/TEST Pin
0_B , User Mode activated
1_B , SBC Software Development Mode activated
Device Configuration Status
0_B , No external pull-up resistor connected on INT (Config 2/4)
1_B , External pull-up resistor connected on INT (Config 1/3)
Status of GPIO2 (if selected as GPIO)
0_B , Low Level (=0)
1_B , High Level (=1)
Status of GPIO1 (if selected as GPIO)
0_B , Low Level (=0)
1_B , High Level (=1)
Reserved, always reads as 0
Status of WK3
0_B , Low Level (=0)
1_B , High Level (=1)
Status of WK2
0_B , Low Level (=0)
1_B , High Level (=1)
Status of WK1
0_B , Low Level (=0)
1_B , High Level (=1)
Note: GPIOx_LVL is updated in SBC Normal and Stop Mode if configured as wake input, low-side switch or high-
side switch.
In cyclic sense or wake mode, the registers contain the sampled level, i.e. the registers are updated after
every sampling. The GPIOs are not capable of cyclic sensing.
If selected as GPIO then the respective level is shown even if configured as low-side or high-side.
Data Sheet
157
Rev. 1.1, 2014-09-26