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TLE9221SX Datasheet, PDF (78/91 Pages) Infineon Technologies AG – FlexRay Transceiver
TLE9221SX
Electrical Characteristics
Table 21 Electrical characteristics (cont’d)
5.5 V < uVBAT < 18 V; 3.0 V < uVIO < 5.25 V; 4.75 V < uVCC < 5.25 V; RDCLOAD = 45 Ω; CDCLOAD = 100 pF;
-40 °C < TJunction < 150 °C;
All voltages with respect to ground; positive current flowing into the pin; (unless otherwise specified)
Pos. Parameter
Symbol Limit Values
Unit Remarks
Min. Typ. Max.
Remote Wake-up Detection: BP, BM
15.1.280 Low-power Receiver
threshold for detecting
“Data_0”
uData0_LP -400 –
-100 mV (see Figure 18),
CT index: 76;
15.1.281 Acceptance time-out of a
dWU0Detect 1
–
4
µs (see Figure 18),
“Data_0” phase in the wake-
CT index: 38;
up pattern
15.1.282 Acceptance time-out of an dWUIdleDetect 1
–
4
µs (see Figure 18),
“Idle” or “Data 1” phase in the
CT index: 39;
wake-up pattern
15.1.283 Acceptance time-out for
dWUTimeout 48
–
wake-up pattern recognition
140 µs (see Figure 18),
CT index: 40;
15.1.284 Acceptance time-out for
interruptions
dWUInterrupt 0.13 –
1
µs (see Figure 20), 2), 12),
CT index: 77;
15.1.285 Response time after wake-up dBDWakeup –
–
100 μs (see Figure 18),
Reactionremote
CT index: 67;
Host Commands and SIR
15.1.290 Mode transition time after
dBDModeChange –
–
100 μs (see Figure 10),
applying the host command
iNH1Leak > 0.2 mA,
all mode changes,
CT index: 69;
15.1.291 Mode transition time to
dBDPowerUp –
–
100 μs VBAT > uBDUVVBAT,
BD_Standby after power-up
VCC > uBDUVVCC,
(see Figure 30);
15.1.292 Filter time for detection of the dBDLogicFilter 10 –
host commands at the pins
EN and STBN
30 μs (see Figure 10);
15.1.293 Time for mode selection via dBDSleep
25
–
the EN pin within the Go-To-
Sleep command
50 μs (see Figure 33);
15.1.294 Timing window for EN pin to dENClock
3
5
8
μs (see Figure 11);
clock out the SIR
15.1.295 Time-out at the EN pin for the dENTimeout 10
–
SIR read-out
30 μs (see Figure 11);
1) FlexRay Physical Layer Conformance Test Specification, version 3.0.1, chapter 5.2, static test cases, index number.
2) Not part of production test, specified by design.
3) No undervoltage at uVIO and either uVCC or uVBAT with supply.
4) Undervoltage at uVIO and either uVCC or uVBAT with supply.
5) BD_Off state uVCC and uVBAT are without supply (see also Chapter 8.4.1).
6) Currents not tested at full uVBAT range in production, they are specified by design.
7) TxD signal is constant from 100 ns up to 4400 ns before the first edge. The parameter is valid for both polarities.
Data Sheet
78
Rev. 1.10, 2013-07-15