TLE9221SX Datasheet, PDF (21/91 Pages) Infineon Technologies AG – FlexRay Transceiver

TLE9221SX
Host Interface and Status Information Register
STBN
STBN = “high” or “low”
“high” for BD_ReceiveOnly mode
“low” for BD_Standby mode
dENClock
additional edge
dENClock dENClock dENClock dENClock
EN
dENTimeout
100% uV_IO
50% uV_IO
0% uV_IO
t
100% uV_IO
50% uV_IO
initialize Host
Interface
enable
SIR
clock out
SIR
ERRN
ERRN status
SIR
SIR
Bit 0
Bit 1
SIR
Bit 15
0% uV_IO
t
exit SIR
select operation mode according to
the host command
100% uV_IO
SIR
Bit 0
50% uV_IO
BD_ReceiveOnly mode or BD_Standby mode
ERRN status
0% uV_IO
t
Figure 12 SIR readout in BD_ReceiveOnly or BD_Standby mode
The SIR readout procedure can be terminated at any time by stopping the clock at the EN input pin. While the
signal at the EN pin is stable for the time t > dEN_Timeout, the TLE9221SX exits the SIR and changes to the operating
mode according to the host command applied.
Note: It is recommended to leave the SIR read out procedure with the same EN signal that was present when the
read out procedure was started. When time t = dEN_Timeout expires, the mode change is triggered
immediately.
6.2.3 Clearing Sequence of SIR
Failure and status information is latched in the SIR and the bits need to be cleared by a host command. In order
to avoid any status bit from being cleared, while the root cause of the bit entry is still present, the TLE9221SX is
equipped with a dedicated sequence to clear the bits of the Status Information Register. Before clearing any bits,
the TLE9221SX checks, if the root cause of the bit entry is resolved. Only if the root cause of the bit entry has
disappeared, the bit will be cleared.
The sequence to clear the bits of the SIR is started by:
• Entering BD_Normal mode via a host command.
• A complete readout of all 16 bits in the SIR.
In case the readout of the SIR is incomplete, for instance, due to a microcontroller interrupt during the readout
procedure, the bits in the SIR remain set.
In case the SIR readout continues after the last bit (bit 15) has been clocked out, the TLE9221SX continues and
clocks out the first bit (bit 0) again. On the second readout the bits in the SIR have been cleared. The bits will only
be cleared if the root cause of setting them has been resolved.
Data Sheet
21
Rev. 1.10, 2013-07-15