TLE9221SX Datasheet, PDF (58/91 Pages) Infineon Technologies AG – FlexRay Transceiver

TLE9221SX
Bus Error Indication
10
Bus Error Indication
In case the TLE9221SX is not able to drive the correct data to the FlexRay bus, the transceiver sets the bus error
bit (bit 4). The bus error bit indicates faulty data by setting the ERRN output to “low” (compare with Table 9).
Therefore, three different detection mechanisms are implemented:
• uV_CC undervoltage detection
• RxD and TxD bit comparison
• Overcurrent detection
Just as any other SIR entry, the bus error bit is reset either by a SIR read-out or by changing over to BD_Normal
mode (compare with Chapter 6.3.1 “Reset the ERRN Output Pin”).
Setting the bus error bit disables the Transmitter of the TLE9221SX in order to avoid corrupt data on the FlexRay
bus. An active bus error bit does not trigger any change in the mode of operation.
10.1
Setting the Bus Error Bit by uV_CC Undervoltage
The Transmitter of the TLE9221SX is fed by the power supply uV_CC (compare with Figure 2). In case uV_CC is in
undervoltage condition, the TLE9221SX cannot drive the correct bus levels to the FlexRay bus. Therefore, the
transceiver sets the uV_CC undervoltage bit together with the bus error bit and the error bit.
In BD_Normal mode, the active uV_CC undervoltage bit and the active bus error bit disable the Transmitter. The
uV_CC undervoltage bit starts the uV_CC undervoltage timer and if the timer expires, the undervoltage flag is set and
a mode changeover is initiated (see also Chapter 8.3.3 “Undervoltage Event at uVCC”).
10.2
Setting the Bus Error Bit by RxD and TxD Comparison
The transceiver TLE9221SX compares the digital input signal at TxD with the signal received from the FlexRay
bus at the RxD output. If the data transmit signal at the TxD input is different from the signal received at the RxD
output, the TLE9221SX sets the bus error bit.
The RxD to TxD bit comparison is active only, when the transceiver TLE9221SX is in BD_Normal mode and the
Transmitter is active (TxEN = “low”; BGE = “high”). Both, the rising and the falling edge at the TxD input signal
trigger an internal comparator to compare the TxD signal with the RxD signal. The results are stored in an internal
error counter. When the internal error counter exceeds 10 reported comparison failures, the bus error bit is set.
The error counter is reset when the Transmitter is reset.
10.3
Setting the Bus Error Bit by Overcurrent Detection
Four different current sensors monitor the output current and the input current at the pins BP and BM. In case the
TLE9221SX detects an overcurrent caused by a bus short-circuit either to GND or to one of the power supplies,
the TLE9221SX sets the bus error bit.
Data Sheet
58
Rev. 1.10, 2013-07-15