TLE75080-EMH Datasheet, PDF (72/80 Pages) Infineon Technologies AG – SPI Driver for Enhanced Relay Control

TLE75080-EMH
Serial Peripheral Interface (SPI)
Table 18 Register addressing space (cont’d)
Register name ADDR0 ADDR1 Size Type Purpose
PWM_CR0
PWM_CR1
PWM_OUT
PWM_MAP
0100_B –
0101_B –
1001_B 00_B
1001_B 01_B
10 r/w
10 r/w
8 r/w
8 r/w
PMW Generator Configuration 0
bits PWM_CR0.FREQ (9:8)
00_B (default) internal clock divided by 1024
01_B internal clock divided by 512
10_B internal clock divided by 256
11_B 100% duty cycle
bits PWM_CR0.DC (7:0) (resolution: 0.39%)
00000000_B, PWM generator is OFF
11111111_B, PWM generator is ON (99.61% duty cycle)
PMW Generator Configuration 1
bits PWM_CR1.FREQ (9:8)
00_B (default) internal clock divided by 1024
01_B internal clock divided by 512
10_B internal clock divided by 256
11_B 100% duty cycle
bits PWM_CR1.DC (7:0) (resolution: 0.39%)
00000000_B, PWM generator is OFF
11111111_B, PWM generator is ON (99.61% duty cycle)
PWM Generator Output Control
bits PWM_OUT.OUTn
0_B (default) The selected output is not driven by one of the
two PWM Generators
1_B The selected output is connected to a PWM Generator
PWM Generator Output Mapping
bits PWM_MAP.OUTn
0_B (default) The selected output is connected to PWM
Generator 0
1_B The selected output is connected to PWM Generator 1
It is necessary to set the PWM_OUT register to activate the
PWM Generator control for the outputs.
10.6.3 Register summary
All registers with addresses not mentioned in Table 19 and Table 20 have to be considered as “reserved”. “Read”
operations performed on those registers return the Standard Diagnosis. The column “Default” indicates the
content of the register (8 or 10 bits) after a reset.
Table 19 Addressable registers (basic functions)
15 14 13-10 9
8
7
6
5
4
3
2
1
0 Default
r = 0 r = 1 0000 00
OUT.OUTn
00_H
w=1 w=0
r = 0 r = 1 0001 00
MAPIN0.OUTn
04_H
w=1 w=0
r = 0 r = 1 0001 01
MAPIN1.OUTn
08_H
w=1 w=0
Data Sheet
72
Rev. 1.0, 2016-06-22