HYB25L256160AF Datasheet, PDF (50/56 Pages) Infineon Technologies AG – 256MBit Mobile-RAM

Random Row Write (Interleaving Banks) with Precharge
HY[B/E]25L256160AF–7.5
256MBit Mobile-RAM
Timing Diagrams
Burst Length = 8, CAS Latency = 2
T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22
CLK
t _CK2
CK E High
CS
RAS
CAS
WE
BS
AP
RAx
RBx
RAy
Addr.
RAx
DQM
H i-Z
DQ
CAx
t _RCD
RBx
CBx
t _WR
RAy
t _RP
CAy
t _WR
DAx0 DAx1 DAx2 DAx3 DAx4 DAx5 DAx6 DAx7 DBx0 DBx1 DBx2 DBx3 DBx4 DBx5 DBx6 DBx7 DAy0 DAy1 DAy2 DAy3 DAy4
A ctivate W rite
Command Command
Bank A Bank A
Figure 33 CAS Latency = 2
A ctivate W rite
Command Command
Bank B Bank B
A ctivate
C om m and
Bank A
Precharge
C om m and
Bank A
P re c h a rg e
Command
Bank B
W rite
C om m and
Bank A
SPT03927_2
Data Sheet
50
Rev. 1.2, 04-2004