HYB18L256160BF Datasheet, PDF (38/49 Pages) Infineon Technologies AG – DRAMs for Mobile Applications

2.4.9.2 SELF REFRESH
CLK
CKE
CS
RAS
CAS
WE
A0-A12
BA0,BA1
= Don't Care
Figure 43 SELF REFRESH Entry Command
HY[B/E]18L256160B[C/F]-7.5
256-Mbit Mobile-RAM
Functional Description
The SELF REFRESH command can be used to retain
data in the Mobile-RAM, even if the rest of the system
is powered down. When in the self refresh mode, the
Mobile-RAM retains data without external clocking. The
SELF REFRESH command is initiated like an AUTO
REFRESH command except CKE is LOW. Input
signals except CKE are “Don’t Care” during SELF
REFRESH.
The procedure for exiting SELF REFRESH requires a
stable clock prior to CKE returning HIGH. Once CKE is
HIGH, NOP commands must be issued for t_RC because
time is required for a completion of any internal refresh
in progress.
The use of SELF REFRESH mode introduces the
possibility that an internally timed event can be missed
when CKE is raised for exit from SELF REFRESH
mode. Upon exit from SELF REFRESH an extra AUTO
REFRESH command is recommended.
CLK
t_RP
> t_RC
t_RC
t_RC
t_SREX
CKE
Command PRE
NOP
ARF
Address
A10 (AP) _{Pre All}
DQ
High-Z
NOP
NOP
NOP
ARF
NOP
ACT
Ba A,
Row n
Row n
Self Refresh
Self Refresh
Entry Command Exit Command
Figure 44 Self Refresh Entry and Exit
Exit from
Self Refresh
Any Command
(Auto Refresh
Recommended)
= Don't Care
Table 13 Timing Parameters for AUTO REFRESH and SELF REFRESH
Parameter
Symbol
- 7.5
Units
min.
max.
ACTIVE to ACTIVE command period
PRECHARGE command period
Refresh period (8192 rows)
Self refresh exit time
t_RC
67
t_RP
19
t_REF
–
t_SREX
1
–
ns
–
ns
64
ms
–
t_CK
1) These parameters account for the number of clock cycles and depend on the operating frequency as follows:
no. of clock cycles = specified delay / clock period; round up to next integer.
Notes
1)
1)
1)
1)
Data Sheet
38
V1.4, 2004-04-30