HYB18L256160BF Datasheet, PDF (26/49 Pages) Infineon Technologies AG – DRAMs for Mobile Applications

HY[B/E]18L256160B[C/F]-7.5
256-Mbit Mobile-RAM
Functional Description
2.4.5.3 READ - DQM Operation
DQM may be used to suppress read data and place the output buffers into High-Z state. The generic timing
parameters as listed in Table 10 also apply to this DQM operation. The read burst in progress is not affected and
will continue as programmed.
CLK
Command READ
Address
Ba A,
Col n
DQM
NOP
NOP
t_DQZ
NOP
NOP
NOP
NOP
NOP
DQ
DO n
DO n+2 DO n+3
Ba A, Col n = bank A, column n
DO n = Data Out from column n
CL = 2 in the case shown.
DQM read latency t_DQZ is 2 clock cycles
Figure 20 READ Burst - DQM Operation
= Don't Care
2.4.5.4 READ to WRITE
A READ burst may be followed by or truncated with a WRITE command. The WRITE command can be performed
to the same or a different (active) bank. Care must be taken to avoid bus contention on the DQs; therefore it is
recommended that the DQs are held in High-Z state for a minimum of 1 clock cycle. This can be achieved by either
delaying the WRITE command, or suppressing the data-out from the READ by pulling DQM HIGH two clock cycles
prior to the WRITE command, as shown in Figure 21. With the registration of the WRITE command, DQM acts as
a write mask: when asserted HIGH, input data will be masked and no write will be performed.
CLK
Command READ
Address
DQM
Ba A,
Col n
DQ
DQ
NOP
NOP
NOP
NOP
WRITE
Ba A,
Col b
NOP
NOP
CL=2
DO n
CL=3
DO n+1
DO n
High-Z
High-Z
DI b
DI b+1 DI b+2
DI b
DI b+1 DI b+2
Ba A, Col n (b) = bank A, column n (b)
= Don't Care
DO n = Data Out from column n; DI b = Data In to column b;
DQM is asserted HIGH to set DQs to High-Z state for 1 clock cycle prior to the WRITE command.
Figure 21 READ to WRITE Timing
Data Sheet
26
V1.4, 2004-04-30