TC1724 Datasheet, PDF (17/134 Pages) Infineon Technologies AG – 32-Bit Single-Chip Microcontroller

TC1724
System Overview of the TC1724
Figure 4 shows the block diagram of the SAK-TC1724F-192F80HR.
PMI
16 KB SPRAM
8 KB ICACHE
(Configurable)
FPU
TriCore
CPU
TC1.3.1
80 MHz
CPS
DMI
116 KB LDRAM
4 KB DCACHE
(Configurable)
Local Memory Bus (LMB)
PMU
1,5 MB PFlash
64 KB Dflash
16 KB BROM
8 KB OVRAM
LFI Bridge
LBCU
M
DMA
16 channels
M/S
Abbreviations:
ICACHE: Instruction Cache
DCACHE Data Cache
SPRAM: Scratch-Pad RAM
LDRAM: Local Data RAM
OVRAM: Overlay RAM
BROM: Boot ROM
PFlash: Program Flash
DFlash: Data Flash
PRAM: Parameter RAM in PCP
CMEM: Code RAM in PCP
1.3V, 3.3V
Int. Supply
Optional Ext. Supply
EVR
Embedded
Voltage
Regulator
5V, 3.3V
Single-source
Ext. Supply
OCDS L1 Debug
Interface
ASC0
ASC1
E-Ray
(2 channels)
CAPCOM
(CCU60, CCU61)
GPT12
(GPT 120)
GPT12
(GPT 121)
GPTA 0
8 KB PRAM
PCP2
Core
24 KB CMEM
PLL
SBCU
E-RAY
fE -Ray
PLL
fC PU
System Peripheral Bus
(SPB)
Interrupt
System
STM
SCU
Ports
BMU
SSC0
SSC1
SSC2
JTAG/DAP
MLI0
MemCheck
FCE
5V
Ext. ADC Supply
ADC0
(5V max,
16
16 channels )
ADC1
8
(5V max,
24 channels )
4
FADC
(3.3V max,
2 differential
channels )
Ext.
Request
Unit
MultiCAN
(3 Nodes,
64 MO)
MSC0
SSC3
BlockDiagram
TC1724F
V0.8
Figure 4 SAK-TC1724F-192F80HR Block Diagram
Data Sheet
2-5
V1.2, 2014-06