ICS8430S10I-03 Datasheet, PDF (5/31 Pages) Integrated Device Technology – Clock Generator for Cavium Processors

ICS8430S10I-03 Data Sheet
Function Tables
Table 3A. Control Input Function Table
Input
Output Frequency
CORE_SEL
QB[0:1]
0
50MHz (default)
1
33.333MHz
Table 3B. Control Input Function Table
Inputs
DDR_SEL1
DDR_SEL0
0
0
0
1
1
0
1
1
Output Frequency
QA, nQA
133.333MHz (default)
100.000MHz
83.333MHz
125.000MHz
Table 3C. Control Input Function Table
Inputs
PCI_SEL1
PCI_SEL0
0
0
0
1
1
0
1
1
Output Frequency
QC
133.333MHz (default)
100.000MHz
66.6667MHz
33.333MHz
Table 3D. Control Input Function Table
Inputs
SPI_SEL1
SPI_SEL0
0
0
0
1
1
0
Output Frequency
QD[0:1]
100.000MHz (default)
125.000MHz
80.000MHz
Table 3E. Control Input Function Table
Input
Output Levels
nLVDS_SEL
QA, nQA
0
LVDS (default)
1
LVPECL
ICS8430S10BYI-03 REVISION A FEBRUARY 22, 2011
5
CLOCK GENERATOR FOR CAVIUM PROCESSORS
©2011 Integrated Device Technology, Inc.