ICS8430S10I-03 Datasheet, PDF (28/31 Pages) Integrated Device Technology – Clock Generator for Cavium Processors

ICS8430S10I-03 Data Sheet
Package Outline and Package Dimensions
Package Outline - Y Suffix for 48 Lead TQFP, EPAD
CLOCK GENERATOR FOR CAVIUM PROCESSORS
-HD VERSION
EXPOSED PAD DOWN
0.20 TAB
-TAB, EXPOSED PART OF CONNECTION BAR OR TIE BAR
Table 9. Package Dimensions 48L TQFP, EPAD
JEDEC Variation: ABC - HD
All Dimensions in Millimeters
Symbol Minimum Nominal Maximum
N
48
A
1.20
A1
0.05
0.10
0.15
A2
0.95
1.00
1.05
b
0.17
0.22
0.27
c
0.09
0.20
D&E
9.00 Basic
D1 & E1
7.00 Basic
D2 & E2
5.50 Ref.
D3 & E3
3.5
e
0.5 Basic
L
0.45
0.60
0.75
θ
0°
7°
ccc
0.08
Reference Document: JEDEC Publication 95, MS-026
ICS8430S10BYI-03 REVISION A FEBRUARY 22, 2011
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©2011 Integrated Device Technology, Inc.