ICS8430S10I-03 Datasheet, PDF (1/31 Pages) Integrated Device Technology – Clock Generator for Cavium Processors

Clock Generator for Cavium Processors ICS8430S10I-03
DATA SHEET
General Description
Features
The ICS8430S10I-03 is a PLL-based clock generator specifically
designed for Cavium Networks SoC processors. This high
performance device is optimized to generate the processor core
reference clock, the DDR reference clocks, the PCI/PCI-X bus
clocks, and the clocks for both the Gigabit Ethernet MAC and PHY.
The clock generator offers low-jitter, low-skew clock outputs, and
edge rates that easily meet the input requirements for the
CN30XX/CN31XX/CN38XX/CN58XX processors. The output
frequencies are generated from a 25MHz external input source or an
external 25MHz parallel resonant crystal. The extended temperature
range of the ICS8430S10I-03 supports telecommunication,
networking, and storage requirements.
Applications
• One selectable differential output pair for DDR 533/400/667,
LVPECL, LVDS interface levels
• Nine LVCMOS/ LVTTL outputs, 23Ω typical output impedance
• Selectable external crystal or differential input source
• Crystal oscillator interface designed for 25MHz, parallel resonant
crystal
• Differential input pair (PCLK, nPCLK) accepts LVPECL, LVDS,
CML, SSTL input levels
• Internal resistor bias on nPCLK pin allows the user to drive PCLK
input with external single-ended (LVCMOS/ LVTTL) input levels
• Power supply modes:
CORE / OUTPUT
3.3V / 3.3V LVDS, LVPECL, LVCMOS
3.3V / 2.5V LVCMOS
• -40°C to 85°C ambient operating temperature
• Available in lead-free (RoHS 6) package
• Systems using Cavium Processors
• CPE Gateway Design
• Home Media Servers
• 802.11n AP or Gateway
• Soho Secure Gateway
• Soho SME Gateway
• Wireless Soho and SME VPN Solutions
• Wired and Wireless Network Security
• Web Servers and Exchange Servers
Pin Assignment
V_DD
nOE_D
GND
nPLL_ SEL
XTAL_IN
XTAL _ OUT
nXTAL_ SEL
PCLK
nPCLK
nOE_C
nOE_B
GND
48 47 46 45 44 43 42 41 40 39 38 37
1
36
2
35
3
34
4
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9
Top View
Top View
28
10
27
11
26
12
25
13 14 15 16 17 18 19 20 21 22 23 24
V_{DDO_CD}
QC
QD0
QD1
CORE_SEL
GND
GND
nOE_REF
V_{DDO_B}
QB0
QB1
V_{DDO_B}
ICS8430S10BYI-03 REVISION A FEBRUARY 22, 2011
1
©2011 Integrated Device Technology, Inc.