ICS840N202I Datasheet, PDF (1/31 Pages) Integrated Device Technology – Fourth generation FemtoClock

FemtoClock® NG Universal Frequency
Translator
ICS840N202I
DATA SHEET
General Description
The ICS840N202I is a highly flexible FemtoClock® NG general
purpose, low phase noise Frequency Translator / Synthesizer with
alarm and monitoring functions suitable for networking and
communications applications. It is able to generate any output
frequency in the 1MHz - 250MHz range (see Table 3 for details). A
wide range of input reference clocks and a range of low-cost
fundamental mode crystal frequencies may be used as the source
for the output frequency.
The ICS840N202I has three operating modes to support a very
broad spectrum of applications:
1) Frequency Synthesizer
• Synthesizes output frequencies from a 16MHz - 40MHz
fundamental mode crystal.
• Fractional feedback division is used, so there are no
requirements for any specific crystal frequency to produce the
desired output frequency with a high degree of accuracy.
2) High-Bandwidth Frequency Translator
• Applications: PCI Express, Computing, General Purpose
• Translates any input clock in the 16MHz - 710MHz frequency
range into any supported output frequency.
• This mode has a high PLL loop bandwidth in order to track input
reference changes, such as Spread-Spectrum Clock
modulation, so it will not attenuate much jitter on the input
reference.
3) Low-Bandwidth Frequency Translator
• Applications: Networking & Communications.
• Translates any input clock in the 8kHz - 710MHz frequency
range into any supported output frequency.
• This mode supports PLL loop bandwidths in the 10Hz - 580Hz
range and makes use of an external crystal to provide
significant jitter attenuation.
This device provides two factory-programmed default power-up
configurations burned into One-Time Programmable (OTP) memory.
The configuration to be used is selected by the CONFIG pin. The two
configurations are specified by the customer and are programmed by
IDT during the final test phase from an on-hand stock of blank
devices. The two configurations may be completely independent of
one another.
One usage example might be to install the device on a line card with
two optional daughter cards: an OC-3 option (configuration 0)
requiring a 155.52MHz clock translated from a 19.44MHz input and
a Gigabit Ethernet option (configuration 1) requiring a 125MHz clock
translated from the same 19.44MHz input reference.
To implement other configurations, these power-up default settings
can be overwritten after power-up using the I²C interface and the
device can be completely reconfigured. However, these settings
would have to be re-written each time the device powers-up.
Features
• Fourth generation FemtoClock® NG technology
• Universal Frequency Translator/Frequency Synthesizer
• Two LVCMOS/LVTTL outputs
• Both outputs may be set to use 2.5V or 3.3V output levels
• Programmable output frequency: 1.0MHz to 250MHz
• Two differential inputs support the following input types: LVPECL,
LVDS, LVHSTL, HCSL
• Input frequency range: 8kHz - 710MHz
• Crystal input frequency range: 16MHz - 40MHz
• Two factory-set register configurations for power-up default state
• Power-up default configuration pin or register selectable
• Configurations customized via One-Time Programmable ROM
• Settings may be overwritten after power-up via I²C
• I²C Serial interface for register programming
• RMS phase jitter at 125MHz, using a 40MHz crystal
(12kHz - 20MHz): 616fs (typical), Low Bandwidth Mode (FracN)
• Output supply voltage modes:
V_DD/V_DDA/V_DDO
3.3V/3.3V/3.3V
3.3V/3.3V/2.5V
2.5V/2.5V/2.5V
• -40°C to 85°C ambient operating temperature
• Lead-free (RoHS 6) packaging
Pin Assignment
XTAL_IN
XTAL_OUT
VDD
CLK_SEL
CLK0
nCLK0
VDD
GND
CLK1
nCLK1
40 39 38 37 36 35 34 33 32 31
1
30
2
29
3
ICS840N202I
28
4
40 Lead VFQFN
27
5 _{6mm x 6mm x 0.925mm} 26
6
K Package
25
7
Top View
24
8
23
9
22
10
21
11 12 13 14 15 16 17 18 19 20
LOCK_IND
VDD
OE0
GND
Q0
V_DDO
Q1
GND
OE1
GND
ICS840N202CKI REVISION A NOVEMBER 1, 2013
1
©2013 Integrated Device Technology, Inc.