82P33731_16 Datasheet, PDF (54/68 Pages) IDEA.lnc. – Synchronous Ethernet

82P33731 Datasheet
Table 31: Gigabit Ethernet Output Clock Jitter Generation
(jitter measured on one differential output of APLL3 with all other outputs disabled)
Output Frequency
RMS Jitter Typ (ps)
RMS Jitter Max (ps)
0.233
0.28
Test Filter
10 kHz - 20 MHz
0.25
0.31
20 kHz - 80 MHz
625MHz
0.12
0.07
0.16
1 MHz - 30 MHz
0.09
1.875 MHz - 20 MHz
0.22
0.38
1 kHz - 1 MHz
0.21
0.24
10 kHz - 1 MHz
NOTE 1: DPLL locked to input clock
NOTE 2: For BER = 10–12, RMS jitter = p-p jitter/13.8 per IEEE 802.3-2008 and IEEE 802.3ae-2002 section 48B.3.1.3.1
Notes
IDT Target Test Filter for
10GbE
ITU-T G.8262 limit 0.5 UI p-p
(1 UI = 100.47 ps)
ITU-T G.8262 limit 1.2 UI p-p
(1 UI = 38.79 ps)
IEEE 802.3-2008
limit 0.28 UI p-p /
0.0203 UI RMS
(1 UI = 100.47 ps)
Table 32: Gigabit Ethernet Output Clock Jitter Generation
(jitter measured on one differential output of APLL1/2 with one differential output enabled)
Output Frequency
RMS Jitter Typ (ps)
RMS Jitter Max (ps)
0.71
1.31
25 MHz
0.57
0.84
0.28
0.42
Test Filter
2.5 kHz - 5 MHz
12 kHz - 5 MHz
637 kHz - 5 MHz
0.72
125MHz
0.58
0.20
1.40
2.5 kHz to 10 MHz
0.86
12 kHz - 20 MHz
0.29
637 kHz - 10 MHz
Notes
ITU-T G.8262
limit 0.5 UI p-p
(1 UI = 0.8 ns)
IEEE 802.3-2008
limit 0.24 UI p-p /
0.0174 UI RMS
(1 UI = 0.8 ns)
ITU-T G.8262
limit 0.5 UI p-p
(1 UI = 0.8 ns)
IEEE 802.3-2008
limit 0.24 UI p-p /
0.0174 UI RMS
(1 UI = 0.8 ns)
©2016 Integrated Device Technology, Inc.
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Revision 5, December 8, 2016