82P33731_16 Datasheet, PDF (46/68 Pages) IDEA.lnc. – Synchronous Ethernet

Table 23: CMOS Input Port with Internal Pull-Down Resistor Electrical Characteristics
Parameter
V_IH
V_IL
P_D
I_IN
Description
Input Voltage High
Input Voltage Low
Pull-Down Resistor
Input Current
Min
Typ
2
50
Table 24: CMOS Output Port Electrical Characteristics
Application Pin
Parameter
Description
Min
Typ
V_OH
Output Voltage High
2.4
Output Clock
V_OL
t_R
Output Voltage Low
Rise time
2.2
t_F
Fall time
2.2
V_OH
Output Voltage High
2.4
Other Output
V_OL
Output Voltage Low
t_R
Rise Time
7
t_F
Fall Time
7
8.3.3
8.3.3.1
LVPECL / LVDS INPUT / OUTPUT PORT
PECL Input Port
VDD (+ 3.3 V)
130 Ω
50 Ω (transmission line)
IN_POS
82 Ω
1 PPS
to
650 MHz
GND
VDD (+ 3.3 V)
130 Ω
50 Ω (transmission line)
82 Ω
IN_NEG
GND
Figure 24. Recommended PECL Input Port Line Termination
82P33731 Datasheet
Max
Unit
Test Condition
V
0.8
V
K
±150
A
Max
Unit
Test Condition
VDD
V
I_OH = -4 mA
0.4
V
I_OL = 4 mA
ns
C_LOAD = 15 pF
ns
C_LOAD = 15 pF
V
I_OH = -2 mA
0.4
V
I_OL= 2 mA
20
ns
C_LOAD = 50 pF
20
ns
C_LOAD = 50 pF
©2016 Integrated Device Technology, Inc.
46
Revision 5, December 8, 2016