82P33731_16 Datasheet, PDF (36/68 Pages) IDEA.lnc. – Synchronous Ethernet

VCC3V3
0.1uF
0.1uF
VCC1V8
0.1uF
0.1uF
VCC3V3
0.1uF
0.1uF
VCC3V3
0.1uF
0.1uF
VCC3V3
0.1uF
0.1uF
VCC3V3
0.1uF
0.1uF
10uF
One 0.1uF
per pin
10uF
One 0.1uF
per pin
10uF
One 0.1uF
per pin
10uF
One 0.1uF
per pin
10uF
One 0.1uF
per pin
10uF
One 0.1uF
per pin
0.1uF
D5, F7
VDDD
VSSD
D4, F6
0.1uF
H12, L10
VDDD_1P8
VSSD
H11, L9
E4, E6, L7, M8 _VDDDO
0.1uF
VSSDO
F4, E7, K7, M7
C1, D2, K1, K2 _VDDA
0.1uF
D1, C2, L1, L2 ^VSSA
C6, C7, F2 , F9 , G2, H2 _VDDA
0.1uF
D6, D7, E2, ^VSSA
F3, F8 , H3
A5, A7, B2, B3, L4, M4 _VDDAO
0.1uF
10uF
B5, B7, B1,
B4, K4, M3
C9, A9
VSSAO
CAP1,2
100nF
B9 ^VSSA
D8 _CAP3
10uF
VSSA
E8
Figure 15. 82P33731 Power Decoupling Scheme
82P33731 Datasheet
©2016 Integrated Device Technology, Inc.
36
Revision 5, December 8, 2016