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HY29DL162 Datasheet, PDF (9/48 Pages) Hynix Semiconductor – 16 Megabit (2M x 8/1M x16) Low Voltage, Dual Bank, Simultaneous Read/Write Flash Memory
HY29DL162/HY29DL163
Table 3. HY29DL16x Bank Options
Device
HY29DL162T
HY29DL163T
HY29DL162B
HY29DL163B
Reference Size (Mbit)
Table 1
2
Table 1
4
Table 2
2
Table 2
4
Bank 1
Sectors Bank Address Size (Mb)
S28 - S38 A[19:17] = 111 14
S24 - S38 A[19:18] = 11
12
S0 - S10 A[19:17] = 000 14
S0 - S14 A[19:18] = 00
12
Bank 2
Sectors Bank Address
S0 - S27 A[19:17] ≤ 110
S0 - S23 A[19:18] ≤ 10
S11 - S38 A[19:17] ≥ 001
S15 - S38 A[19:18] ≥ 01
Table 4. HY29DL16x Secure Sector Addressing
Device
Sector Size
KB/KW
Sector Address
A[19:12] 1
Byte Mode
Address Range 2, 3
Word Mode
Address Range 2, 3
HY29DL162T/163T
HY29DL162B/163B
64/32
64/32
11111XXX
00000XXX
0x1F0000 - 0x1FFFFF 0xF8000 - 0xFFFFF
0x000000 - 0x00FFFF 0x00000 - 0x07FFF
Notes:
1. ‘X’ indicates don’t care.
2. ‘0xN. . . N’ indicates an address in hexadecimal notation.
3. The address range in byte mode is A[19:0, -1]. The address range in word mode is A[19:0].
Sec2 NOT Programmed or Protected at the Factory
If the security feature is not required, the Sec2 can
be treated as an additional Flash memory space
of 64 Kbytes. The Sec2 can be read, programmed,
and erased as often as required. The Sec2 area
can be protected using the following procedure:
n Write the three-cycle Enter Secure Sector Re-
gion command sequence
n Then follow the sector protect algorithm shown
in Figure 1, except that RESET# may be at
either VIH or VID. This allows in-system protec-
tion of the Secure Sector without raising any
device pin to a high voltage. Note that this
method is only applicable to the Secure Sec-
tor.
n Once the Secure Sector is locked and verified,
the system must write the Exit Secure Sector
command sequence to return to reading and
writing the remainder of the array.
Sec2 protection must be used with caution since,
once protected, there is no procedure available
for unprotecting the Sec2 area and none of the
bits in the Sec2 memory space can be modified in
any way.
BUS OPERATIONS
Device bus operations are initiated through the
internal command register, which consists of sets
of latches that store the commands, along with
the address and data information, if any, needed
to execute the specific command. The command
register itself does not occupy any addressable
memory location. The contents of the command
register serve as inputs to an internal state ma-
chine whose outputs control the operation of the
device. Table 5 lists the normal bus operations,
the inputs and control levels they require, and the
resulting outputs. Certain bus operations require
a high voltage on one or more device pins. Those
are described in Table 6.
Read Operation
Data is read from the HY29DL16x by using stan-
dard microprocessor read cycles while placing the
byte or word address on the device’s address in-
puts. The host system must drive the CE# and
OE# pins Low and drive WE# High for a valid read
operation to take place. The BYTE# pin deter-
mines whether the device outputs array data in
words (DQ[15:0]) or in bytes (DQ[7:0]).
r1.3/June 01
9