GMS81C2112 Datasheet, PDF (81/107 Pages) Hynix Semiconductor – HYNIX SEMICONDUCTOR 8-BIT SINGLE-CHIP MICROCONTROLLERS

GMS81C2112/GMS81C2120
.
Oscillator
(X_IN pin)
Internal Clock
External Interrupt
BIT Counter n n+1 n+2
Normal Operation
STOP Instruction
Executed
n+3
Stop Operation
01
Clear
FE FF
t_ST > 20ms
by software
012
Normal Operation
Before executing Stop instruction, Basic Interval Timer must be set
properly by software to get stabilization time which is longer than 20ms.
Figure 17-2 STOP Mode Release Timing by External Interrupt
Oscillator
(XI pin)
STOP Mode
Internal
Clock
RESETB
Internal
RESETB
STOP Instruction Execution
Time can not be control by software
Stabilization Time
t_ST = 64mS @4MHz
Figure 17-3 Timing of STOP Mode Release by RESET
17.3 Wake-up Timer Mode
In the Wake-up Timer mode, the on-chip oscillator is not
stopped. Except the Prescaler(only 2048 divided ratio) and
Timer0, all functions are stopped, but the on-chip RAM
and Control registers are held. The port pins out the values
held by their respective port data register, port direction
registers.
The Wake-up Timer mode is activated by execution of
STOP instruction after setting the bit WAKEUP of
CKCTLR to “1”. (This register should be written by
byte operation. If this register is set by bit manipulation
instruction, for example "set1" or "clr1" instruction, it
may be undesired operation)
Note: After STOP instruction, at least two or more NOP in-
struction should be written
Ex)
LDM TDR0,#0FFH
LDM TM0,#0001_1011B
LDM CKCTLR,#0100_1110B
STOP
NOP
NOP
In addition, the clock source of timer0 should be selected
to 2048 divided ratio. Otherwise, the wake-up function can
not work. And the timer0 can be operated as 16-bit timer
with timer1. (refer to timer function)The period of wake-
up function is varied by setting the timer data register 0,
TDR0.
JUNE. 2001 Ver 1.00
75