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GMS81C2112 Datasheet, PDF (44/107 Pages) Hynix Semiconductor – HYNIX SEMICONDUCTOR 8-BIT SINGLE-CHIP MICROCONTROLLERS
GMS81C2112/GMS81C2120
CKCTLR
[2:0]
000
001
010
011
100
101
110
111
Source clock
fXIN÷8
fXIN÷16
fXIN÷32
fXIN÷64
fXIN÷128
fXIN÷256
fXIN÷512
fXIN÷1024
Interrupt (overflow) Period (ms)
@ fXIN = 4MHz
0.512
1.024
2.048
4.096
8.192
16.384
32.768
65.536
Table 10-1 Basic Interval Timer Interrupt Time
CKCTLR
76543210
- WAKEUP RCWDT WDTONBBTTCCLL BTS2 BTS1 BTS0
ADDRESS: 0ECH
INITIAL VALUE: -001 0111B
Caution:
Both register are in same address,
when write, to be a CKCTLR,
when read, to be a BITR.
Basic Interval Timer source clock select
000:
001:
ffXXIINN
÷
÷
8
16
010:
011:
100:
101:
110:
111:
ffffffXXXXXXIIIIIINNNNNN
÷
÷
÷
÷
÷
÷
32
64
128
256
512
1024
Clear bit
0: Normal operation (free-run)
1: Clear 8-bit counter (BITR) to “0”. This bit becomes 0 automatically
after one machine cycle, and starts counting.
0: Operate as a 7-bit general timer
1: Enable Watchdog Timer operation
See the section “Watchdog Timer”.
0: Disable Internal RC Watchdog Timer
1: Enable Internal RC Watchdog Timer
0: Disable Wake-up Timer
1: Enable Wake-up Timer
BITR
76543210
BTCL
8-BIT FREE-RUN BINARY COUNTER
ADDRESS: 0ECH
INITIAL VALUE: Undefined
Figure 10-2 BITR: Basic Interval Timer Mode Register
Example 1:
Basic Interval Timer Interrupt request flag is generated
every 4.096ms at 4MHz.
:
LDM
SET1
EI
:
CKCTLR,#03H
BITE
Example 2:
Basic Interval Timer Interrupt request flag is generated
every 1.024ms at 4MHz.
:
LDM
SET1
EI
:
CKCTLR,#01H
BITE
38
JUNE. 2001 Ver 1.00