GMS81C2112 Datasheet, PDF (60/107 Pages) Hynix Semiconductor – HYNIX SEMICONDUCTOR 8-BIT SINGLE-CHIP MICROCONTROLLERS

GMS81C2112/GMS81C2120
If it needed more higher frequency of PWM, it should be
reduced resolution.
Frequency
Resolution _{T1CK[1:0] T1CK[1:0]}
= 00(250nS) = 01(500nS)
10-bit
3.9KHz
0.98KHZ
9-bit
7.8KHz
1.95KHz
8-bit
15.6KHz
3.90KHz
7-bit
31.2KHz
7.81KHz
T1CK[1:0]
= 10(2uS)
0.49KHZ
0.97KHz
1.95KHz
3.90KHz
Table 12-2 PWM Frequency vs. Resolution at 4MHz
The bit POL of TM1 decides the polarity of duty cycle.
If the duty value is set same to the period value, the PWM
output is determined by the bit POL (1: High, 0: Low). And
if the duty value is set to "00_H", the PWM output is deter-
mined by the bit POL (1: Low, 0: High).
It can be changed duty value when the PWM output. How-
ever the changed duty value is output after the current pe-
riod is over. And it can be maintained the duty value at
present output when changed only period value shown as
Figure 12-14. As it were, the absolute duty time is not
changed in varying frequency. But the changed period val-
ue must greater than the duty value.
TM1
PWM1HR
POL
X
-
-
16BIT PWM1E CAP1 T1CK1 T1CK0 T1CN T1ST
ADDRESS : D2H
RESET VALUE : 00000000
0
1
0
X
X
X
X
ADDRESS : D5H
-
-
- PWM1HR3PWM1HR2PWM1HR1PWM1HR0 _{RESET VALUE : ----0000}
Bit Manipulation Not Available
-
-
-
X
X
X
X
Period High
Duty High
PWM1HR[3:2]
X : The value "0" or "1" corresponding your operation.
T0 clock source
[T0CK]
T1ST
0 : Stop
1 : Clear and Start
T1PPR(8-bit)
COMPARATOR
SQ
MUX
÷1
fXI
÷2
÷8
CLEAR
1
R
(2-bit) T1 ( 8-bit )
COMPARATOR
POL
T1CK[1:0]
T1CN
Slave
T1PDR(8-bit)
R56/
PWM1O/T1O
PWM1O
[R5FUNC.6]
PWM1HR[1:0]
Master
T1PDR(8-bit)
Figure 12-12 PWM Mode
54
JUNE. 2001 Ver 1.00