GMS81C2112 Datasheet, PDF (53/107 Pages) Hynix Semiconductor – HYNIX SEMICONDUCTOR 8-BIT SINGLE-CHIP MICROCONTROLLERS

GMS81C2112/GMS81C2120
8-bit Event Counter Mode
In this mode, counting up is started by an external trigger.
This trigger means falling edge or rising edge of the EC0
pin input. Source clock is used as an internal clock selected
with timer mode register TM0. The contents of timer data
register TDR0 is compared with the contents of the up-
counter T0. If a match is found, an timer interrupt request
flag T0IF is generated, and the counter is cleared to “0”.
The counter is restart and count up continuously by every
falling edge or rising edge of the EC0 pin input.
The maximum frequency applied to the EC0 pin is f_XIN/2
[Hz].
Start count
ECn pin input
Up-counter
TDR1
T1IF interrupt
0
1
2
n
In order to use event counter function, the bit 2 of the R5
function register (R5FUNC.2) is required to be set to “1”.
After reset, the value of timer data register TDR0 is unde-
fined, it should be initialized to between 1_H~FF_H
not to
"0"The interval period of Timer is calculated as below
equation.
Period (sec)
=
----¹------
f_XIN
×
2
×
Divide
Ratio
×
TDR0
n-1 n 0
1
2
Figure 12-5 Event Counter Mode Timing Chart
TDR1
Timer 1 (T1IF)
Interrupt
T1ST
Start & Stop
T1CN
Control count
clear & start
stop
~~
disable ^enable
~~
up-count
Occur interrupt
Occur interrupt
T1ST = 1
T1ST = 0
T1CN = 0
T1CN = 1
Figure 12-6 Count Operation of Timer / Event counter
TIME
JUNE. 2001 Ver 1.00
47