GMS81C2112 Datasheet, PDF (48/107 Pages) Hynix Semiconductor – HYNIX SEMICONDUCTOR 8-BIT SINGLE-CHIP MICROCONTROLLERS

GMS81C2112/GMS81C2120
12. TIMER/EVENT COUNTER
The GMS81C21xx has two Timer/Counter registers. Each
module can generate an interrupt to indicate that an event
has occurred (i.e. timer match).
Timer 0 and Timer 1 are can be used either two 8-bit Tim-
er/Counter or one 16-bit Timer/Counter with combine
them.
In the "timer" function, the register is increased every in-
ternal clock input. Thus, one can think of it as counting in-
ternal clock input. Since a least clock consists of 2 and
most clock consists of 2048 oscillator periods, the count
rate is 1/2 to 1/2048 of the oscillator frequency in Timer0.
And Timer1 can use the same clock source too. In addition,
Timer1 has more fast clock source (1/1 to 1/8).
In the “counter” function, the register is increased in re-
sponse to a 1-to-0 (falling edge) or 0-to-1(rising edge) tran-
sition at its corresponding external input pin, EC0.
In addition the “capture” function, the register is increased
in response external or internal clock sources same with
timer or counter function. When external clock edge input,
the count register is captured into capture data register
CDRx.
Timer1 is shared with "PWM" function and "Compare out-
put" function
It has seven operating modes: "8-bit timer/counter", "16-
bit timer/counter", "8-bit capture", "16-bit capture", "8-bit
compare output", "16-bit compare output" and "10-bit
PWM" which are selected by bit in Timer mode register
TM0 and TM1 as shown in Figure 12-1 and Table 12-1.
16BIT
CAP0
CAP1
PWM1E
T0CK
[2:0]
0
0
0
0
XXX
0
0
1
0
111
0
1
0
0
XXX
0
X
0
1
XXX
1
0
0
0
XXX
1
0
0
0
111
1
1
X
0
XXX
1
0
0
0
XXX
T1CK
[1:0]
XX
XX
XX
XX
11
11
11
11
PWM1O
TIMER 0
TIMER 1
0
8-bit Timer
8-bit Timer
0
8-bit Event counter
8-bit Capture
1
8-bit Capture (internal clock) 8-bit Compare Output
1
8-bit Timer/Counter
10-bit PWM
0
16-bit Timer
0
16-bit Event counter
0
16-bit Capture (internal clock)
1
16-bit Compare Output
Table 12-1 Operating Modes of Timer0 and Timer1
42
JUNE. 2001 Ver 1.00