HMC700LP4 Datasheet, PDF (7/36 Pages) Hittite Microwave Corporation – 8 GHz 16-Bit Fractional-N PLL

v07.0411
HMC701LP6CE
8 GHz 16-Bit Fractional-N PLL
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Theory of Operation
The HMC701LP6CE synthesizer consists of the following functional blocks
1. Reference Path Input Buffers
2. Reference Path Divider
3. VCO Path Input Buffer
4. VCO Path Multi-Modulus Prescaler/Divider
5. Δ∑ Fractional Modulator
6. Phase Frequency Detector
7. Charge Pump
8. Main Serial Port
9. VCO Serial Port for Stepped VCO Support
10. Temperature Sensor
11. Power On Reset Circuit
12. CW Sweeper Subsystem
13. Auxiliary Clock Generator
14. General Purpose Output (GPO) Bus
15. Multiple VCO Controller
Each of these blocks is described briefly in the following section.
Reference Path
The full Reference Path block diagram is shown in Figure 1 The ultra low noise phase detector requires the best
possible reference signal. Since a given application may desire to use a square wave or a 50 Ohm sinusoidal crystal
source, HMC701LP6CE offers two input ports, each one optimized for the lowest possible noise for the source type
being used.
For absolute best low noise performance, the sine wave path should be used.
The user should use only one Ref path input, that is the input that matches their reference source type. Note the input
is defaulted to the square wave input on power up. Should the sine reference path be used, it is necessary to enable
the sine input, shut down the square wave input and set the mux (rfp_buf_sin_en=1, rfp_buf_sq_en=0, rfp_buf_sin_
sel=1, Table 12). The unused port should be left open.
The reference path supports input frequencies of up to 250 MHz typical, however the maximum frequency at the
phase detector (PFD) depends upon the mode of operation, worst case at +85°C, 70 MHz in fractional mode and
100 MHz in integer mode. Hence reference inputs of greater than the PFD maximum frequency must use the
appropriate R divider setting.
Figure 1. Reference Sine Input Stages
The unused reference port is normally not connected.
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