HMC700LP4 Datasheet, PDF (34/36 Pages) Hittite Microwave Corporation – 8 GHz 16-Bit Fractional-N PLL

v07.0411
HMC701LP6CE
8 GHz 16-Bit Fractional-N PLL
Table 37. Reg 1Bh GPO Control Register
Bit
Type
Name
gpo_sel
gpo_sel<3:0> = 0000
gpo_sel<3:0> = 0001
gpo_sel<3:0> = 0010
gpo_sel<3:0> = 0011
3:0
R/W ^{gpo_sel<3:0> = 0100}
gpo_sel<3:0> = 0101
gpo_sel<3:0> = 0110
gpo_sel<3:0> = 0111
gpo_sel<3:0> = 1000
gpo_sel<3:0> = 1001
gpo_sel<3:0> = 1010
6:4
R/W gpo_sel_0_data
7
R/W gpo_dig_drive_en
gpo_ind_drive_dis
10:8
R/W
Default
0
Description
Selects data to be driven on GPO ports
GPO3 <=gposel_0_data<2>
GPO2 <= gposel_0_data<1>
GPO1 <= gposel_0_data<0>
GPO3 <= xref_clk_in
GPO2 <= ref_clk_in
GPO1 <= vco_div_clkin
GP03 <= pfd_up_in
GP02 <= pfd_dn_in
GP01 <= LKD_monost_window
GP03 <= pfd_sat_ref_in
GP02 <= pfd_sat_vco_div_in
GP01 <= delta_integer_cycslip_sel, this strobe
holds the gain of the PFD at max for anti-cycle
slipping
GP03 <= xref_clk_in
GP02 <= xref_sin_in
GP01 <= sd_frac_strobe_sync, internally
synchronized frac strobe
Reserved
GP03 <= SD_Intz1<1>
GP02 <=SD_Intz1<2>
GP01 <= SD_Intz1<3>
3-bit quantized version of the VCO phase
GP03 <= aux_clk
GP02 <= ringosc_test
GP01 <= clk_SD
GP03 <= 00
GP02 <= ramp_busy
GP01 <= Reserved
Reserved
GP03 <= Δ∑ Quantizer Output 3rd lsb
GP02 <= Δ∑ Quantizer Output 2nd lsb
GP01 <= Δ∑ Quantizer Output lsb
this data is driven on gpo if gpo_sel==0
enables Tri-state drivers on GPO output pads
000 = all GPO pad drivers enabled
xx1 = disable GPO1 pad driver
x1x = disable GPO2 pad driver
1xx = disable GPO3 pad driver
0
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