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HMC700LP4 Datasheet, PDF (29/36 Pages) Hittite Microwave Corporation – 8 GHz 16-Bit Fractional-N PLL
v07.0411
HMC701LP6CE
8 GHz 16-Bit Fractional-N PLL
0
Table 18. Reg 07h Charge Pump UP/DN Control Register
Bit
Type
Name
Default
Description
4:0
R/W cp_UPcurrent_sel
16
Sets Charge-Pump Up gain, 125uA lsb, binary,
4mA max
9:5
R/W cp_DNcurrent_sel
16
Sets Charge-Pump Dn gain, 125uA lsb, binary,
4mA max
Table 19. Reg 08h Charge Pump Trim & Offset Register
Bit
Type
Name
Default
Description
3:0
R/W cp_UPtrim_sel
0
Trim Up gain, 14.3uA lsb, binary, 100uA max
7:4
R/W cp_DNtrim_sel
0
Trim Dn gain, 14.3uA lsb, binary, 100uA max
11:8
R/W cp_UPoffset_sel
4
Up Offset leakage current, 28.7uA lsb, binary,
430uA max
15:12
R/W cp_DNoffset_sel
0
Dn Offset leakage current, 28.7uA , binary,
430uAmax
17:16
R/W cp_amp_bias_sel
2
Charge Pump Dummy Branch Op amp bias
selection, 100uA
Table 20. Reg 09h Charge Pump EN Register
Bit
Type
Name
Default
0
R/W cp_pull_updn_en
0
1
R/W cp_pull_dn_upb
0
Description
Enables CP UP/Down Control Reg09 [1]
0 - Forces Charge Pump Up when Reg09[0]=1
1 - Forces Charge Pump DN when Reg09[0]=1
Table 21. Reg 0Ah Reserved
Bit
Type
Name
23:0
R/W Reserved
Default
0
Reserved
Description
Table 22. Reg 0Bh Reserved
Bit
Type
Name
23:0
R/W Reserved
Default
0
Reserved
Description
Table 23. Reg 0Ch Reserved
Bit
Type
Name
23:0
R/W Reserved
Default
0
Reserved
Description
Table 24. Reg 0Dh Reserved
Bit
Type
Name
23:0
R/W Reserved
Default
0
Reserved
Description
Table 25. Reg 0Eh Reserved
Bit
Type
Name
23:0
R/W Reserved
Default
0
Reserved
Description
0 - 29
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