HD49323AF Datasheet, PDF (9/27 Pages) Hitachi Semiconductor – CDS/AGC & 10-bit A/D Converter

5. Digital output enable function
When the OE pin is driven high, digital output goes to the high-Z state.
OE Pin
High
Low (or Open, GND)
Digital Output
High-Z state
Output enable
HD49323AF-01
6. Pre-blanking function
When the PBLK pin is driven high, digital output is fixed at 32 LSB. However, this is valid only when
the OE pin and serial data output mode settings (LINV, MINV, TEST, STBY) are low.
PBLK Pin
High
Low (or Open, GND)
Digital Output
Fixed at 32 LSB
Active
7. CCD offset cancel function
This function cancels the offset voltage (V_OFCCD) during the optical black period of the CCD imaging
element. The definition of the CCD offset voltage (V_OFCCD) is given below.
• The difference between the black level sampling voltage and signal level sampling voltage during the
OBP period is designated V_OFCCD. This value is positive when (signal level sampling voltage) > (black
level sampling voltage).
Input signal for one pixel
(during OBP period)
CDS input
V_OFCCD (at +)
V_OFCCD (at −)
Black level
sampling
point
Signal level
sampling
point
Figure 2 Black Level Signal Level Difference during OBP Period
Table 3 Serial Data Settings
V_OFCCD Cancel Function
Serial data settings
When Used
VOFCON bit set to 1
VOFD0—3 (4 bits) set
When Not Used
VOFCON bit cleared to 0
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