HD49323AF Datasheet, PDF (20/27 Pages) Hitachi Semiconductor – CDS/AGC & 10-bit A/D Converter

HD49323AF-01
Serial Interface Specification
SDATA latched
CS
at rise of SCK *1
t_INT1
f_SCK
t_INT2 _{*2, 3}
SCK
SDATA
t_su
t_ho
Data fixed
at rise of CS
DI DI DI DI DI DI DI DI DI DI DI DI DI DI DI DI
00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15
Note: 1. SDATA is latched at the rise of SCK.
2. Input 16 SCK clocks while CS is low. If the number of clocks is more or less than 16,
the data will be invalid.
3. If data transmission is aborted, the data is invalid.
Figure 7 Serial Interface Specification
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