HD49323AF Datasheet, PDF (3/27 Pages) Hitachi Semiconductor – CDS/AGC & 10-bit A/D Converter

HD49323AF-01
Pin Description
Pin No.
1
2
3 to 10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
Symbol
PBLK
D0
D1 to D8
D9
NC
OE
DV _SS
DV _DD
ADCLK
OBP
SPBLK
SPSIG
AV_SS
AV_DD
NC
CLP
VRM2
AV_SS
AV_DD
CDSIN
TESTY
TESTC
AV_SS
AV_DD
VRB
VRM
VRT
Description
Pre-blanking pin
Digital output (LSB)
Digital output
Digital output (MSB)
No connection pin
Digital output enable control pin
Digital ground (0 V)
Digital power supply (3 V)
Connect off-chip in common with AV_DD.
ADC conversion clock input pin
Optical black pulse input pin
Black level sampling clock input pin
Signal level sampling clock input pin
Analog ground (0 V)
Analog power supply (3 V)
Connect off-chip in common with DV_DD.
No connection pin
Clamp voltage pin
Connect a 0.22 µF or more capacitor between CLP and AV_SS.
Reference voltage pin (for CCD offset cancel)
Analog ground (0 V)
Analog power supply (3 V)
Connect off-chip in common with DV_DD.
CDS input pin
Test input pin-Y
Test input pin-C
Analog ground (0 V)
Analog power supply (3 V)
Connect off-chip in common with DV_DD.
Reference voltage pin 3
Connect a 0.1 µF ceramic capacitor between VRB and AV_SS.
Reference voltage pin 2
Connect a 0.1 µF ceramic capacitor between VRM and AV_SS.
Reference voltage pin 1
Connect a 0.1 µF ceramic capacitor between VRT and AV_SS.
Analog(A) or
I/O Digital(D)
I
D
OD
OD
OD
——
I
D
—D
—D
I
D
I
D
I
D
I
D
—A
—A
——
—A
—A
—A
—A
I
A
I
A
I
A
—A
—A
—A
—A
—A
3