HD66760 Datasheet, PDF (61/105 Pages) Hitachi Semiconductor – 104 X 80-dot Graphics LCD Controller/Driver for 256 Colors

HD66760
8. Read/Write mode 4: AM = 1, LG2–0 = 100/101
This mode is used when the data is vertically written by comparing the original data and the set value of
the compare register (CP7–0). It reads the display data (original data), which has already been written in
the GRAM, compares the original data and the set value of the compare register in byte units, and writes
the data sent from the microcomputer to the GRAM only when the result of the compare operation
satisfies the condition. This mode reads the data during the same access-pulse width (68-system: enabled
high level, 80-system: RD* low level) as the write operation since reading the original data does not latch
the read data into the microcomputer but temporarily holds it in the read-data latch. However, the bus
cycle requires the same time as the read operation. The swap function (SWP) and write-data mask
function (WM15–0) are also enabled in these operations. After writing, the address counter (AC)
automatically increments by 256, and automatically jumps to the upper-right edge (I/D = 1) or upper-left
edge (I/D = 0) following the I/D bit after it has reached the lower edge of the GRAM.
Operation Examples:
1) I/D = "1", AM = "1", LG2-0 = "101" (unmatched write), SWP = "0"
2) CP7–0 = "53H"
3) WM15–0 = "0000"H
4) AC = "000"H
WM15
WM0
Write-data mask: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
CP7
CP0
Compare register: _{0 1 0 1 0 0 1 1}
DB15 (Unmatched)
Compare
operation
DB0
Read data (1): 1 0 0 1 1 0 0 1 0 1 0 1 0 0 1 1 C
Conditional replacement
Write data (1):
Read data (2):
Write data (2):
Read data (3):
10 1 111 0 00 110 00 0 1
Compare
(Unmatched) (Unmatched) _operation
00 00 11 1 100 00 0 000
C
11 00 00 1 110 00 1 100
Compare
(Unmatched) _operation
01 0 10 011 10 0 00 11 0
C
R
10 1 111 0 00 10 100 1 1
Conditional replacement
R
11 00 00 1 110 00 1 100
Conditional replacement
Write data (3): 1 1 1 1 0 1 0 0 0 0 0 1 1 1 1 1
R
01 0 10 011 00 0 11 11 1
"0000"H
"0001"H
"0000"H 1 0 1 1 1 1 0 0 0 1 0 1 0 0 1 1 ^{Write data (1)}
"0080"H 1 1 0 0 0 0 1 1 1 0 0 0 1 1 0 0 ^{Write data (2)}
"0100"H 0 1 0 1 0 0 1 1 0 0 0 1 1 1 1 1 ^{Write data (3)}
"4F00"H
Notes: 1. The bits in the GRAM indicated by '*' are not changed.
2. After writing to address 4F00H, the AC jumps to 0001H.
GRAM
Figure 41 Writing Operation of Read/Write Mode 4