HD66760 Datasheet, PDF (45/105 Pages) Hitachi Semiconductor – 104 X 80-dot Graphics LCD Controller/Driver for 256 Colors

HD66760
a) Basic data-send timing through the I²C bus interface
Transfer start
Transfer end
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27
SCL
(input)
SDA
(input/
output)
"0" "1" "1" "1" "0" ID RS "1" Ack D7 D6 D5 D4 D3 D2 D1 D0 Ack D7 D6 D5 D4 D3 D2 D1 D0 Ack
Device ID code
RS RW
Start byte
Acknowledge
1st data
2nd data
Acknowledge
Status / read data register
Acknowledge
b) 1st and 2nd byte assignment
1st byte
2nd byte
D7 D6 D5 D4 D3 D2 D1 D0
D7 D6 D5 D4 D3 D2 D1 D0
DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB8
Status / read data register
upper bits
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Status / read data register
lower bits
c) Consecutive data-send timing through the I²C bus interface
SCL
SDA ^S
Start byte
(SR or R00h read)
Transfer start
Dummy read
(1 byte)
Status or device code
upper bits (1 byte)
Status or device code
lower bits (1 byte)
2 bytes
SDA ^{S Start byte (RS=1)}
Dummy read
(5 bytes)
Read data upper bits
(1 byte)
Read data lower bits
( 1 byte)
Transfer start
2 bytes
note:
- After start byte transfer, upper bits of the status or read data register should be read first.
- Start byte should be transfered just after start (S).
Figure 30 I²C bus interface data-send sequence
Status lower bits
(1 bye)
P
Transfer end
Read data lower bits
( 1 byte)
P
Transfer end