HD66760 Datasheet, PDF (16/105 Pages) Hitachi Semiconductor – 104 X 80-dot Graphics LCD Controller/Driver for 256 Colors

HD66760
Table 7 Relationship between Display Position and GRAM Address (GS = 1, SGS = 0)
SEG/COM Pin
CMS=0
CMS=1
DB
15
DB DB
87
DB DB
0 15
DB DB
87
DB
0
COM1 COM80
"0000"H
"0001"H
COM2 COM79
"0100"H
"0101"H
COM3 COM78
"0200"H
"0201"H
COM4 COM77
"0300"H
"0301"H
COM5 COM76
"0400"H
"0401"H
COM6 COM75
"0500"H
"0501"H
COM7 COM74
"0600"H
"0601"H
COM8 COM73
"0700"H
"0701"H
COM9 COM72
"0800"H
"0801"H
COM10 COM71
"0900"H
"0901"H
COM11 COM70
"0A00"H
"0A01"H
COM12 COM69
"0B00"H
"0B01"H
COM13 COM68
"0C00"H
"0C01"H
COM14 COM67
"0D00"H
"0D01"H
COM15 COM66
"0E00"H
"0E01"H
COM16 COM65
"0F00"H
"0F01"H
COM17 COM64
"1000"H
"1001"H
COM18 COM63
"1100"H
"1101"H
COM19 COM62
"1200"H
"1201"H
COM20 COM61
"1300"H
"1301"H
DB
DB DB
DB DB
DB DB
DB
15
87
0 15
87
0
"000B"H
"000C"H
"010B"H
"010C"H
"020B"H
"020C"H
"030B"H
"030C"H
"040B"H
"050B"H
"040C"H
"050C"H
"060B"H
"060C"H
"070B"H
"070C"H
"080B"H
"080C"H
"090B"H
"090C"H
"0A0B"H
"0A0C"H
"0B0B"H
"0B0C"H
"0C0B"H
"0C0C"H
"0D0B"H
"0D0C"H
"0E0B"H
"0E0C"H
"0F0B"H
"0F0C"H
"100B"H
"100C"H
"110B"H
"110C"H
"120B"H
"120C"H
"130B"H
"130C"H
COM73 COM8
"4800"H
"4801"H
COM74
COM75
COM76
COM7
COM6
COM5
"4900"H
"4A00"H
"4B00"H
"4901"H
"4A01"H
"4B01"H
COM77 COM4
"4C00"H
"4C01"H
COM78 COM3
"4D00"H
"4D01"H
COM79 COM2
"4E00"H
"4E01"H
COM80 COM1
"4F00"H
"4F01"H
Note: When the GS bit is updated, the RAM data must be rewritten.
"480B"H
"490B"H
"4A0B"H
"4B0B"H
"4C0B"H
"4D0B"H
"4E0B"H
"4F0B"H
"480C"H
"490C"H
"4A0C"H
"4B0C"H
"4C0C"H
"4D0C"H
"4E0C"H
"4F0C"H
Table 8 Relationship between GRAM Data and Display Contents
GRAM Data
DB DB DB DB DB DB DB DB DB DB DB DB DB DB DB DB
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Selection Palette RK, GK, BK RK, GK, BK RK, GK, BK RK, GK, BK RK, GK, BK RK, GK, BK RK, GK, BK RK, GK, BK
Output Pin
SEG (24n+1) SEG (24n+4) SEG (24n+7) SEG (24n+10) SEG (24n+13) SEG (24n+16) SEG (24n+19) SEG (24n+22)
SEG (24n+3) SEG (24n+6) SEG (24n+9) SEG (24n+12) SEG (24n+15) SEG (24n+18) SEG (24n+21) SEG (24n+24)
Note: n = Lower 4-bit address (0 to 12)
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